Centaur Technology

Centaur Technology
Company type	Subsidiary
Industry	Semiconductor
Founded	April 1995; 31 years ago
Founder	Glenn Henry, Terry Parks, Darius Gaskins, Al Sato
Defunct	2021
Fate	Operations ceased; x86 division personnel acquired by Intel
Successor	VIA Technologies (parent company)
Headquarters	United States
Products	x86 CPUs (WinChip, VIA C3, VIA C7, VIA Nano, CNS core)
Owner	VIA Technologies
Parent	VIA Technologies

Centaur Technology was a company specializing in the design of x86 CPUs, established in 1995 and eventually becoming a fully owned subsidiary of VIA Technologies. Its origins and early development are documented in the 2015 film Rise of the Centaur. The company ceased operations in 2021.

History

Founded in April 1995 by Glenn Henry, Terry Parks, Darius Gaskins, and Al Sato, Centaur Technologies Inc. received initial investment from Integrated Device Technology, Inc (IDT). The firm aimed to produce affordable, energy-efficient x86 processors as alternatives to those from Intel. Their approach combined:

designing a novel x86 processor core with optimization strategies distinct from Intel’s;
implementing a unique management system to enhance productivity.

During its tenure under IDT, Centaur introduced three processor models branded as WinChip. In September 1999, the Taiwanese corporation VIA Technologies acquired the company. Under VIA's ownership, five new designs were launched under the VIA C3 name, along with several VIA C7 models and the sophisticated 64-bit VIA Nano CPU.

The VIA Nano architecture saw further advancement through products developed by Zhaoxin, a joint venture involving VIA. By late 2019, Centaur unveiled the CNS core, described as the "World’s First High-Performance x86 SoC with Integrated AI Coprocessor."

In November 2021, Intel purchased most of Centaur’s x86 division personnel from VIA for $125 million, securing critical expertise. However, VIA retained ownership of the x86 license and patents and continued its collaboration with Zhaoxin on CPU development.

Design methodology

Centaur’s processors have traditionally been more compact than comparable x86 counterparts, resulting in lower production costs and improved energy efficiency—attributes that made them attractive for embedded systems.

Their design strategy prioritized delivering adequate performance aligned with specific market needs, often adopting trade-offs that diverged from conventional industry practices.

Centaur and VIA were early adopters of processors featuring hardware acceleration for encryption, hashing, and random number generation through the VIA PadLock security engine, first introduced in the 2004 VIA C7. Around this period, NSC Geode LX incorporated AES128 support as well. Subsequently, Intel and AMD integrated similar features such as AES-NI (2008), Intel SHA extensions (2013), and RDRAND (2015).

VIA C3

VIA processors place strong emphasis on memory subsystem performance by utilizing large primary caches (128KB), extensive TLBs, and aggressive prefetching techniques—prioritizing these over minimizing die area.
The architecture favors achieving higher clock speeds rather than increasing instructions per cycle; it omits complex features like out-of-order execution to reduce chip size and power consumption while maintaining clock frequency.
Its pipeline is designed to execute common register–memory x86 instructions within a single clock cycle, leading to fewer cycles for many frequently used instructions compared to other x86 processors.
Infrequent or complex x86 instructions are implemented via microcode emulation to conserve die space and lower power usage, with negligible impact on common workloads.
These design principles reflect a RISC-like philosophy—smaller, streamlined instruction sets optimized for performance—despite supporting the complex CISC x86 instruction set.
Furthermore, these CPUs include support for an undocumented Alternate Instruction Set.

VIA C7

The VIA C7 Esther (C5J) succeeded the VIA C3 Nehemiah+ (C5P), continuing Centaur's approach of optimizing both performance and energy efficiency.
The VIA C3 lineup demonstrated that a straightforward in-order core could rival more complex superscalar designs when paired with a well-optimized front-end architecture, including features like prefetching, cache management, and branch prediction.
In the VIA C7, enhancements were made primarily to front-end components—such as increasing cache capacity, improving associativity, boosting throughput, and refining prefetch mechanisms—while the execution core largely remained consistent.
By circumventing thermal limitations on clock speeds, VIA C7 achieved superior performance compared to AMD and Intel processors.

VIA Nano

The VIA Nano Isaiah (CN) marked Centaur's introduction of their first 64-bit superscalar out-of-order processor.
This generation prioritized a substantial increase in performance-per-watt while keeping thermal design power (TDP) comparable to that of the VIA C7.

CNS core

In late 2019, Centaur revealed the x86-64 "CNS" processor featuring AVX-512 capabilities alongside an integrated AI coprocessor. The CNS supported up to eight cores running at a base clock of 2 GHz and utilized the LGA2011 socket form factor; however, it lacked electrical compatibility with Intel motherboards. Built on TSMC's 16 nm fabrication process, the CNS project was discontinued in 2021 following VIA's partial divestiture of Centaur assets to Intel. Technologies developed for the CNS subsequently found application in processors produced by Zhaoxin Semiconductor, a joint venture involving VIA.

Comparative die size

Processor	Secondary cache (kB)	Die size 130 nm (mm²)	Die size 90 nm (mm²)	Die size 65 nm (mm²)
VIA Nano 1000/2000	1024	N/A	N/A	63.3
VIA C3 / VIA C7	64/128	52	30	N/A
Athlon XP	256	84	N/A	N/A
Athlon 64	512	144	84	77
Pentium M	2048	N/A	84	N/A
P4 Northwood	512	146	N/A	N/A
P4 Prescott	1024	N/A	110	N/A

Note: The compact die size of VIA’s x86 core contributes to cost-effective manufacturing. On a 90 nm process node, nearly four VIA C7 cores can be accommodated within the area required for a single Pentium 4 Prescott core, underscoring VIA’s efficient chip layout.

External links