Joel Emer

Joel S. Emer
Born	(1954-03-02) March 2, 1954
Occupation(s)	Computer engineer, microprocessor designer, professor
Years active	1970s–present
Known for	Computer performance evaluation, microprocessor design, simultaneous multithreading, store sets, Asim simulator
Notable work	"A characterization of processor performance in the VAX-11/780" (1984)

Joel S. Emer (born March 2, 1954) is recognized as a trailblazer in the field of computer performance evaluation and an esteemed microprocessor designer. He is currently engaged in research at Nvidia and holds the position of Professor of the Practice at MIT. Earlier in his career, he was honored as an Intel Fellow and was awarded the distinguished Eckert–Mauchly Award in 2009.

Early life and education

Emer obtained both his bachelor's degree in 1974 and master's degree in 1975 in electrical engineering from Purdue University. He earned his doctoral degree in electrical engineering from the University of Illinois, Urbana-Champaign in 1979, under the mentorship of Professor Edward S. Davidson.

Career

Starting his professional journey at Digital Equipment Corporation, Emer specialized in performance assessment for the VAX and Alpha processor lines, gaining recognition as a pioneer in quantitative computer architecture analysis. His work had a direct impact on multiple VAX and Alpha processor designs through sophisticated performance methodologies.

Subsequently, he moved to Compaq and later to Intel, where he led Microarchitecture Research at the Massachusetts Microprocessor Design Center. In 2001, he was appointed Intel Fellow. Emer co-authored a foundational 1984 publication with Douglas W. Clark analyzing processor performance; their findings showed that the VAX-11/780 delivered an actual performance of 0.5 MIPS instead of DEC’s advertised 1 MIPS. This study helped establish the widely accepted "iron law of processor performance," which connects CPI, clock frequency, and instruction count.

His contributions extend to key advancements such as simultaneous multithreading (SMT), memory dependence prediction through store sets, analysis of soft errors, and leadership in developing the Asim simulator. His enduring contributions were recognized by his election to the National Academy of Engineering in 2020 for pioneering quantitative approaches applied to commercial microprocessor enhancements.

Since joining Nvidia in 2014, Emer has been part of their Architecture Research division while retaining his academic affiliation with MIT, continuing to shape microprocessor architecture research and strategy.

See also

• List of fellows of the Association for Computing Machinery

References

Notes

• Emer, Joel S.; Clark, Douglas W. (1984). "A characterization of processor performance in the VAX-11/780". Proceedings of the 11th Annual International Symposium on Computer Architecture. pp. 301–310.