MasPar
| Company type | Private |
|---|---|
| Industry | Computer hardware, Supercomputers |
| Founded | 1987 |
| Founder | Jeff Kalb |
| Defunct | 1999 |
| Fate | Renamed NeoVista Software, acquired by Accrue Software in 1999, then JDA Software in 2001 |
| Successor | NeoVista Software, Inc. |
| Headquarters | Sunnyvale, California , United States |
Area served | Worldwide |
Key people | Jeff Kalb (founder) |
| Products | Minisupercomputers (MP-1, MP-2) |
MasPar Computer Corporation—which later became known as NeoVista Software, Inc.—was a company specializing in minisupercomputers, established in 1987 by Jeff Kalb and headquartered in Sunnyvale, California.
History
During his tenure as Vice President at Digital Equipment Corporation (DEC), where he was responsible for integrated circuit development, Jeff Kalb observed researchers creating a supercomputer inspired by the Goodyear MPP design. Key improvements included:
- Processor elements expanded from 1-bit to 4-bit units
- Enhanced connectivity, increasing each processor’s neighbors from four to eight
- Implementation of a global interconnect through a triple-redundant switching mechanism, which was less complex than a full crossbar switch
When DEC chose not to pursue commercialization of this technology, Kalb launched MasPar to bring the minisupercomputer to market. The company introduced its initial model, the MP-1, in 1990, followed by the MP-2 two years later. More than 200 units were delivered. MasPar’s SIMD systems utilized proprietary processing elements and were also manufactured under license by DEC.
MasPar and its competitor nCUBE openly positioned themselves against government-supported rivals such as Intel’s hypercube iPSC and the Connection Machine from Thinking Machines Corporation, particularly in relation to DARPA funding.
In June 1996, MasPar discontinued its hardware operations to concentrate on data mining software development under the new identity NeoVista Software. NeoVista was subsequently acquired by Accrue Software in 1999, which then transferred ownership to JDA Software in 2001.
Examples of MasPar machines from NASA’s Goddard Space Flight Center are preserved at the Computer History Museum.
Hardware
MasPar was recognized for producing SIMD supercomputers, setting itself apart from vector-based designs. Its architecture comprised numerous Arithmetic Logic Units (ALUs) governed by a single Array Control Unit (ACU) synchronized under one clock signal, emphasizing efficient communication and minimal latency. This architecture carefully balances processing power, memory access, and inter-processor communication to achieve scalable performance.
The MasPar MP-1 processing element and its binary-compatible successor, the MP-2 PE, were fully custom CMOS chips designed internally and manufactured by companies such as HP and Texas Instruments.
Instruction fetching is handled by the ACU following a load-store model with a broadly Harvard-style architecture. Microcoded instructions enable RISC-like execution throughput of one instruction per clock cycle. Each chip integrates 32 ALUs connected to their eight nearest neighbors via edge links that support toroidal wraparound. Systems can scale up to 16,384 processing elements within a single cabinet, interconnected through a global crossbar switch that facilitates external input/output operations.
The MP-2 PE chip consists of 32 independent 32-bit ALUs equipped with floating-point units, registers, and barrel shifters; instruction fetching remains centralized in the ACU. Each ALU slice contains 64 registers of 32 bits each for both integer and floating-point calculations conforming to IEEE 754 single and double precision standards. Communication ports enable bit-serial data transfer at rates of 1 Mbyte/s between neighboring processors and global routers, supporting collective operations like broadcast and reduction.
Local memory is implemented externally using DRAM modules; no on-chip memory is present. The 32 processing elements are divided into two clusters sharing a common memory interface (known as an M-machine), coordinated by a global scoreboard that manages resource allocation. Each processor includes 64 Kbytes of local memory with support for both direct and indirect addressing modes and accommodates big-endian and little-endian data formats.
Manufactured using 1.0-micrometer CMOS technology, the chip runs at a clock speed of 12.5 MHz while consuming approximately 0.8 watts of power. It is packaged in a 208-pin PQFP module.
MasPar systems typically connected to host computers—often VAX machines—and utilized extended versions of Fortran and C programming languages with full compliance to IEEE floating-point standards. The ALUs do not incorporate caches since the memory interface operates at speeds comparable to ALU access times. Data memory lacks management units; virtual memory techniques are applied solely for instruction memory through demand paging.
As part of its marketing strategy, MasPar distributed business cards embedded with an actual MP-2 PE chip.
See also
References
External links
- Articles with short description
- American companies established in 1987
- American companies disestablished in 1999
- Companies based in Sunnyvale, California
- Computer companies established in 1987
- Computer companies disestablished in 1999
- Defunct computer companies of the United States
- Defunct computer hardware companies
- Defunct computer systems companies
- Massively parallel computers
- Parallel computing
- Serial computers
- SIMD computing
- Supercomputers
- 5
- Companies of the United States by year of establishment