Pyramid Technology

Pyramid Technology Corporation

Company type	Private
Industry	Computer hardware, Minicomputers
Founded	1981 (1981)
Founder	Ex-Hewlett-Packard personnel
Defunct	March 1995 (1995-03)
Fate	Acquired by Siemens AG
Headquarters	San Francisco Bay Area , United States
Area served	Worldwide
Products	High-performance RISC minicomputers (90x, 98x, MIServer, Nile series)

Pyramid Technology Corporation was a firm focused on producing high-performance minicomputers based on RISC architecture. Established in 1981 in the San Francisco Bay Area by ex-Hewlett-Packard personnel, Pyramid gained recognition for delivering the second multiprocessor UNIX system, the DC/OSx, in 1985. This dual-environment UNIX supported both 4.xBSD and AT&T UNIX System V software, which remained central to their offerings through the early 1990s.

History

In 1993, Pyramid granted a license for its multiprocessor bus technology to Fujitsu/ICL, initiating a marketing alliance whereby ICL marketed Pyramid servers and integrated them with its mainframe solutions. By 1994, ICL intended to embed Pyramid’s technology into their own SPARC-based platforms, moving away from Pyramid’s MIPS-based designs.

Pyramid was acquired by Siemens AG in March 1995 and incorporated into Siemens Computer Systems US. This division was later divided in 1998, with the services branch becoming Wincor Nixdorf. In 1999, Siemens and Fujitsu combined their computing businesses to create Fujitsu Siemens Computers, which was subsequently joined by Amdahl in 2000.

90x

The initial product line from Pyramid Technology debuted in August 1983 with the release of the 90x superminicomputer, equipped with a proprietary 32-bit scalar processor operating at 8 MHz.

Although promoted as a RISC system, it utilized microprogramming and featured a "sliding window" register architecture inspired by Berkeley RISC principles. While memory access instructions were intricate and required multiple cycles, many scalar operations completed within a single cycle. Floating point instructions were originally microcoded, with an optional dedicated floating point unit introduced later. Microprogramming allowed for advanced capabilities such as block move instructions.

The design offered access to 64 registers: 16 global registers always accessible and a set of 48 registers arranged as a stack for subroutine calls. This stack cache accommodated up to 16 levels with automatic overflow and underflow management. The architecture employed two stacks—one for registers and another for local variables—to optimize parameter passing and return value handling in subroutines.

Memory expansion was achieved through four boards initially containing 1 MB each—a size adequate at launch but often fully utilized due to increasing program demands. These RAM boards were socketed, allowing upgrades up to 4 MB as DRAM technology improved.

The 90x directly competed with Digital Equipment Corporation’s (DEC) VAX 11/780, the dominant UNIX platform of the early 1980s. Performance evaluations indicated that the 90x delivered approximately twice the speed of the VAX while costing about half as much. Pyramid capitalized on DEC’s reluctance to offer VAX systems without the expensive VMS operating system; universities seeking UNIX preferred Pyramid for its superior performance and cost-effectiveness despite its emerging market status.

A significant feature was its asynchronous serial port controller—the Intelligent Terminal Server (ITS)—built around a 16-bit bit-slice processor. Each ITS managed sixteen high-speed serial ports using DMA, thereby minimizing CPU overhead compared to competitors that required frequent CPU intervention for input/output operations. Multiple ITS units could be installed per machine, enhancing scalability and serial I/O throughput.

Disk and tape controllers consisted of third-party 16-bit Multibus cards connected via a bus-adapter board. Early configurations included a Fujitsu Eagle disk drive with 470 MB capacity and a slot-loading reel-to-reel tape drive.

Similar to the console processor arrangement found in VAX systems, the 90x incorporated a Motorola 68000-based System Support Processor responsible for loading microcode from a 5.25-inch floppy disk during startup and running diagnostic software accessible remotely via modem. Initially, this administrative software was named Totally Unrealistic Remote Diagnostic.

A compact system could be housed within a single 19-inch rack approximately 60 inches tall, integrating card cage, disk drive, tape drive, control panel with floppy disk drive, and an ignition key—remarkably space-efficient for its era. Notably, some units operated under unconventional conditions; one example in Australia functioned from a converted outdoor restroom equipped with air conditioning. The control panel included an eight-segment LED bar graph used to indicate CPU utilization or error codes, while the console terminal was positioned atop the cabinet due to the system’s low height profile.

98x

Building upon the 90x series, the 98x introduced a processor clock speed increase to 10 MHz. Originally designed as a single-processor platform, the 98x evolved into Pyramid’s inaugural symmetric multiprocessing (SMP) system by 1986. The lineup expanded from the single-CPU 9805 to the quad-CPU 9845 models, launched between 1985 and 1987. The flagship 9845 achieved approximately 25 MIPS, which was competitive during that era, though it did not reach the performance levels of leading supercomputers.

In 1986, Pyramid targeted budget-conscious workstation and server segments with the WorkCenter, a more affordable half-height variant of the 98x. This model featured a horizontally oriented tape drive alongside disk drives to reduce costs.

Early Pyramid 9xxx family systems—from the 90x through to the 9810—utilized a common physical bus architecture and were designed to be field upgradeable.

MIServer

Starting in 1989, Pyramid transitioned to using "commodity" RISC processors with the launch of the MIServer series, moving away from their custom RISC CPU designs. The MIServer supported configurations with up to ten CPUs, each delivering roughly 12 MIPS. Between 1991 and 1992, Pyramid released the MIServerT, followed by the MIServer S and ES models, marking their first machines based on the R3000 architecture. Initial versions incorporated between 4 and 12 R3000 CPUs running at 33 MHz, achieving peak throughput near 140 MIPS; subsequent MIServer ES variants scaled up to accommodate as many as 24 CPUs. These systems operated on DC/OSx, a port of AT&T’s System V Release 4 (SVR4).

Nile series

The introduction of the 150 MHz 64-bit R4400 processor facilitated the development of the Nile series in late 1993. These systems supported between 2 and 16 CPUs, each delivering around 92 MIPS—positioning them as genuine supercomputers for their time. Pyramid’s final offering before acquisition was the Reliant RM 1000 (Meshine), a massive parallel processing (MPP) system featuring a two-dimensional mesh topology. Each node ran an independent instance of Reliant UNIX DC/OSx and was managed by software called ICF, which later evolved into PrimeCluster HA software still maintained by Fujitsu Siemens.

Each computing node contained a single MIPS R10000 CPU, with enhancements enabling Nile SMP systems to function as "fat" nodes. Nodes were housed within HAAS-3 frames that controlled numerous SCSI disks and were interconnected via short ribbon cables. These frames were organized into cells and tons—units used to define system scale—with the largest experimental mesh consisting of 214 CPUs, including four Nile SMP nodes.

Although these systems were eventually discontinued without direct Siemens successors, major clients such as UK telecommunications companies depended on them for many years due to their exceptional I/O capabilities and computational power.

External links

• Pyramid Technology, Form 10-K, Annual Report, Filing Date Dec 22, 1994