Rigel (microprocessor)
| Industry | Computer hardware |
|---|---|
| Founded | November 8, 1957 |
| Headquarters | Maynard, Massachusetts , United States |
| Products | Rigel microprocessor chipset, Mariah microprocessor chipset |
Rigel was a microprocessor chipset created and manufactured by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). It debuted on 11 July 1989 alongside the VAX 6000 Model 400 and was also incorporated into the VAX 4000 Model 300 and VAXstation 3100 Model 76. The operating frequency of Rigel CPUs ranged from 35 to 43 MHz.
The Rigel chipset consisted of the following components:
- REX520 central processing unit (also known as DC520 or "P-chip")
- DC523 floating-point unit ("KIWI" or "F-chip")
- DC592 cache controller ("COW" or "C-chip")
- DC521 clock chip
For systems featuring the VAX vector processor option, two extra chips were included: the DC555 Vector Register set ("VERSE") and the DC556 Vector Data Path ("FAVOR"). Additional support chips comprised the RSSC (Rigel System Support Chip) and Ghidra, which served as the VAX 4000 system interface chip.
REX520
The architecture of the Rigel CPU drew from the design of the VAX 8800 processor, incorporating a six-stage microinstruction pipeline along with a fully associative translation look-aside buffer containing 64 entries. It offered optional vector processing capabilities by decoding vector instructions and routing them to the dedicated vector interface chip.
Within the REX520 was a unified primary cache of 2 KB, configurable as an instruction cache, supplemented by an external secondary cache of 128 KB realized through CMOS SRAM. This external cache compensated for the absence of the integrated 64 KB primary cache found in the VAX 8800, which could not be integrated on-die in this design. The backup cache controller was located on the vector interface chip.
The REX520 chip contained approximately 320,000 transistors—140,000 allocated to logic circuits and 180,000 to memory elements—fabricated on a die measuring 12 mm by 12 mm (144 mm²) and packaged in a ceramic housing with 224 leads.
Fabrication
DEC manufactured Rigel using their second-generation CMOS technology (CMOS-2), characterized by a feature size of 1.5 μm and employing two layers of aluminium interconnects.
Mariah
Mariah represented an upgraded iteration of Rigel, produced with DEC’s CMOS-3 process featuring a finer 1 μm fabrication node. This enhancement enabled clock rates between 55 and 71 MHz. The Mariah series included the CPU (DC595), floating-point unit (DC596), and cache controller (DC597). Notable advancements encompassed a larger first-level cache of 4 kB, support for 32-bit physical memory addressing within the CPU, and implementation of write-back caching in the cache controller. Systems utilizing Mariah included the VAX 6000 Model 500, MicroVAX 3100 Model 80, and VAXstation 4000 Model 60.