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Ambric

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Adapted from the English Wikipedia article Ambric, available under CC BY-SA 4.0Updated 25 July 2025
Ambric, Inc.
Company typePrivate
IndustrySemiconductor
Founded1 January 2003; 23 years ago (2003-01-01) in Beaverton, Oregon, United States
FounderJay Eisenlohr, Anthony Mark Jones
Defunct2008 (2008)
FateCeased operations; product line continued by Nethra Imaging until 2012
Headquarters
Beaverton
,
United States
ProductsAm2045 Massively Parallel Processor Array (MPPA) chips and development tools

Ambric, Inc. specialized in designing computer processors, recognized primarily for its innovative Ambric architecture. Its Am2045 Massively Parallel Processor Array (MPPA) chips were engineered for demanding high-performance embedded systems, including applications in medical imaging, video processing, and signal processing.

Established in 2003 in Beaverton, Oregon by entrepreneurs Jay Eisenlohr and Anthony Mark Jones, Ambric capitalized on the founders' extensive industry expertise. Eisenlohr had previously sold Rendition, Inc. to Micron Technology for $93 million, while Jones, a seasoned analog and digital IC designer with over 120 U.S. patents, had founded several companies. In 2019, Jones co-founded Vitek IP alongside patent specialist Dan Buri. Ambric introduced the Am2045 processor and accompanying software tools in 2007; however, the company faced challenges following the 2008 economic downturn. Its product line continued to be offered through Nethra Imaging, Inc. until that company's closure in 2012.

Architecture and programming model

The architecture of Ambric is based on a massively parallel distributed memory multiprocessor system utilizing the Structural Object Programming Model. Each processing unit executes a limited subset of Java and/or assembly instructions. Communication among the hundreds of processors on the chip occurs through reconfigurable, self-synchronizing channels that manage both data transfer and synchronization, functioning similarly to a Kahn process network with bounded buffers.

Devices and tools

The Am2045 chip comprises 336 fixed-point 32-bit RISC DSP cores, each paired with 2-kibibyte memory blocks, capable of running at frequencies up to 300 MHz. Its development environment is built on Eclipse and includes an editor, compiler, assemblers, simulator, configuration generator, source-level debugger, along with libraries tailored for video/image processing, signal processing, and video codec support.

Power and performance

With a power consumption ranging between 6 and 12 watts depending on workload, the Am2045 achieves performance metrics of 1 TeraOPS (Operations Per Second) and 50 Giga-MACs (fixed-point Multiply-Accumulates per second).

Applications

Ambric’s MPPA solutions were designed for compute-intensive streaming media tasks such as high-definition video compression at 2K and 4K resolutions, transcoding, image recognition algorithms, medical imaging systems, signal processing workflows, software-defined radio platforms, and similar domains. These devices offered benefits over FPGA, DSP, and ASIC alternatives by delivering superior performance efficiency, scalability, and accelerated development cycles through software programmability rather than hardware design modifications. Their ready availability further strengthened their attractiveness in the market.

Video codec libraries supported professional standards including DVCPRO HD, VC-3 (DNxHD), AVC-Intra among others.

A prominent client implemented more than 13,000 cores distributed across 40 Am2045 chips within a single ATCA chassis to perform 3D X-Ray reconstruction while maintaining power usage below 500 watts.

Related

Similar MPPA technologies are offered by companies such as picoChip and IntellaSys as well as research projects like UC Davis’s AsAP chip. The manycore processor sector also includes competitors like Aspex Semiconductor, Cavium, ClearSpeed, Coherent Logix, SPI, and Tilera. Meanwhile, established corporations like Texas Instruments and Freescale provide multicore processors featuring fewer cores—usually between three and eight—that employ conventional shared-memory architectures.

Recognition

In 2006, the Ambric architecture received the MPR Analysts' Choice Award for Innovation from Microprocessor Report, acknowledging its groundbreaking approach to massively parallel processor design. Later, in 2013, the IEEE International Symposium on Field-Programmable Custom Computing Machines honored Ambric's architecture as one of the Top 20 most impactful papers throughout the conference's two-decade history.

Further reading

  • Tom Halfhill, "Ambric's New Parallel Processor", Microprocessor Report, October 10, 2006.
  • Tom Halfhill, "MPR Innovation Award: Ambric", Microprocessor Report, February 20, 2007.

External links