Tabula, Inc.
| Company type | Private |
|---|---|
| Industry | Semiconductor |
| Founded | 2003 |
| Founder | Steve Teig |
| Defunct | March 24, 2015 |
| Headquarters | Santa Clara , United States |
| Products | 3-D field programmable gate arrays (3-D FPGAs), ABAX series 3-D programmable logic devices (3PLDs), networking components |
Tabula, Inc. was a fabless semiconductor enterprise headquartered in Santa Clara, California, established in 2003 by Steve Teig, who previously served as CTO at Cadence Design Systems. The company secured $215 million through venture funding and concentrated on the creation of three-dimensional field programmable gate arrays (3-D FPGAs). In 2012, it achieved the position of third place on the Wall Street Journal's "Next Big Thing" ranking.
Products
The company engineered the ABAX series of 3-D integrated circuits, branded as 3-D programmable logic devices (3PLDs). These FPGA components contained between 220,000 and 630,000 4-input lookup tables (LUTs), supported physical clock frequencies up to 1.6 GHz, and incorporated as many as 1,280 digital signal processing (DSP) units with 18x18 multipliers. Additionally, they offered up to 920 general-purpose input/output (GPIO) pins and 48 SerDes lanes capable of data rates reaching 6.5 Gbit/s. Fabrication of ABAX chips utilized TSMC’s 40 nm technology node, with packaging options in flip-chip format featuring either 1,936 or 1,156 pins.
Internally, ABAX leveraged rapid reconfiguration across up to eight "folds" to simulate expanded FPGA resources; however, when all folds were active simultaneously, the maximum LUT capacity reduced operational frequency to approximately 200 MHz. The anticipated volume cost per unit in 2012 ranged from $100 to $200.
Beyond core FPGA products, Tabula provided networking components such as bridges between 100 Gb or 40 Gb Ethernet and Interlaken protocols, high-performance packet search engines, and multiport 10 Gb Ethernet processors designed for use in switches, routers, or programmable network interface cards.
In February 2012, Tabula revealed intentions to produce its forthcoming FPGA generation utilizing Intel’s 22 nm process technology. By mid-2013, it was one of only five firms granted access to Intel’s semiconductor fabrication facilities.
The Spacetime product line was developed with the goal of surpassing conventional FPGA architectures by combining two spatial dimensions with a temporal dimension into a cohesive structure. This methodology aimed to deliver denser and faster programmable devices supported by software that automatically translated standard RTL designs onto this novel platform.
Operations at Tabula were discontinued on March 24, 2015.
See also
External links
- Steve Teig Lecture on Tabula and Entrepreneurship, October 23, 2013
- Steve Teig Presentation on Spacetime 3D Programmable Integrated Circuits (11 minutes), June 18, 2012
- Steve Teig Talk on Spacetime 3D Programmable Integrated Circuits (61 minutes), October 7, 2012
- Short description with empty Wikidata description
- Defunct semiconductor companies of the United States
- Fabless semiconductor companies
- Electronic design automation companies
- Reconfigurable computing
- Manufacturing companies based in California
- Technology companies based in the San Francisco Bay Area
- Companies based in Santa Clara, California
- Electronics companies established in 2003
- Electronics companies disestablished in 2015
- 2003 establishments in California
- 2015 disestablishments in California
- Defunct companies based in the San Francisco Bay Area
- Defunct computer companies of the United States
- Defunct computer hardware companies