Cray X-MP

Cray Research
Industry	Supercomputing, Computer hardware
Founded	1972; 54 years ago
Founder	Seymour Cray
Headquarters	Chippewa Falls, United States
Products	Cray X-MP, Cray-1, Cray-2, Cray Y-MP

The Cray X-MP was a supercomputer developed and marketed by Cray Research, unveiled in 1982 as the follow-up to the 1975 Cray-1. From 1983 until 1985, it held the title of the fastest computer globally, achieving peak speeds of up to 800 MFLOPS through its four-processor configuration. The chief architect behind this system was Steve Chen.

Description

A major innovation of the X-MP compared to the Cray-1 was its shared-memory parallel vector processor design, which incorporated up to four CPUs housed within a chassis comparable in size to that of the Cray-1.

Each processor ran at a clock cycle of 9.5 nanosecond (equivalent to 105 MHz), surpassing the Cray-1A’s 12.5 ns cycle time. Constructed using bipolar gate-array integrated circuits, its CPU architecture closely mirrored that of the Cray-1 but featured enhanced memory bandwidth with two read ports and one write port per CPU, along with improved support for chaining operations. Every CPU could deliver a maximum throughput of 200 MFLOPS.

At launch, the X-MP supported a main memory capacity of 16 MB (2 million 64-bit words) distributed over 16 banks, utilizing bipolar SRAM integrated circuits. Versions equipped with CMOS memory, derived from the Cray-1M, were rebranded as Cray X-MP/1s, aiding in the development of Cray’s UNIX port.

In 1984, Cray introduced upgraded variants featuring one, two, or four processors and memory sizes ranging from 4 to 8 million words. The most advanced model, the X-MP/48, incorporated four CPUs delivering over 800 MFLOPS peak performance and supported up to 16 million words of memory. These iterations added vector gather/scatter instructions and employed either bipolar or MOS SRAM ICs depending on configuration.

Initially, the system operated on the proprietary Cray Operating System (COS) while maintaining object-code compatibility with the Cray-1. A UNIX System V-based OS variant—originally named CX-OS and later rebranded as UNICOS—ran through a guest OS mechanism and became the primary operating system starting in 1986. The United States Department of Energy used alternative operating systems such as the Cray Time Sharing System and NLTSS. For more information on software compatibility and applications, refer to the Cray-1 article.

Extended Architecture series

In 1986, Cray Research launched the X-MP Extended Architecture (EA) series. The EA processors operated at an accelerated clock speed of 8.5 ns (117 MHz) and were fabricated using macrocell array and gate array IC technologies. This design expanded the A and B registers to 32 bits and introduced support for 32-bit address calculations, allowing theoretical memory addressing up to two billion words. The largest system configuration housed 64 million words of MOS SRAM across 64 banks. To ensure backward compatibility with software designed for Cray-1 and earlier X-MP models, support for 24-bit addressing was retained. Each EA CPU achieved a peak throughput of 234 MFLOPS, with a four-processor setup capable of reaching up to 942 MFLOPS.

I/O subsystem

The input/output subsystem incorporated between two and four I/O processors that controlled from two to thirty-two disk storage devices. Hard drives manufactured by Ibis—the DD-39 and DD-49 models—offered raw data transfer rates of 13.3 MB/s and capacities of approximately 1.2 GB each; their unstriped transfer speeds were 5.9 MB/s and 9.8 MB/s respectively. Optional solid-state drives were available in sizes of 256 MB, 512 MB, or 1024 MB, providing transfer rates ranging from 100 to 1,000 MB/s per channel. Total storage capacity could scale up to a maximum of 38 GB.

For magnetic tape input/output operations, the system interfaced directly with IBM 3420 and IBM 3480 tape drives, reducing CPU load during data transfers.

Pricing

In 1984, the cost of an X-MP/48 system was roughly US$15 million, excluding expenses for disk storage. The following year, Bell Labs purchased a Cray X-MP/24 for $10.5 million, along with eight DD-49 drives valued at $1 million, while receiving a trade-in credit of $1.5 million for their existing Cray-1 system.

Successors

Introduced in 1985, the Cray-2 presented a novel compact design featuring four processors and main memory capacities ranging between 64 MW (512 MB) and 512 MW (4 GB). Although it was rated at 500 MFLOPS, its performance lagged behind the X-MP in certain computations due to increased memory latency.

The Cray Y-MP upgrade arrived in 1988 with a revamped architecture that replaced the original 16-gate ECL gate arrays with more densely packed VLSI gate arrays and expanded circuit boards. This significant advancement allowed support for up to eight processors and delivered a substantial performance boost compared to the X-MP series.

Usage

The 1984 short film The Adventures of André & Wally B., created by The Graphics Group (which later became Pixar), utilized an X-MP/48 extensively for rendering, with special acknowledgment to Cray Research.
The 1984 movie The Last Starfighter depended on the X-MP to render intricate models with high polygon counts and sophisticated lighting effects.
The 1986 Marvel Productions logo animation, showcasing a silver-hued Spider-Man, was produced using the X-MP.
Animation rendering for Mick Jagger's "Hard Woman" music video made extensive use of the X-MP system.

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