IBM 1620

IBM 1620

Company type	Scientific minicomputer
Industry	Computer hardware
Founded	1959-10-21
Defunct	1970-11-19
Successor	IBM 1130
Area served	Worldwide
Products	Scientific minicomputer

The IBM 1620 was a scientific minicomputer launched by IBM on October 21, 1959, positioned as an economical option for scientific computing. Nearly two thousand units were manufactured before it was discontinued on November 19, 1970. Adapted variants functioned as central processing units within the IBM 1710 and IBM 1720 Industrial Process Control Systems, establishing it as the earliest digital computer dependable enough for real-time process control in manufacturing settings.

Its variable-word-length decimal design set it apart from fixed-word-length binary machines and contributed to its popularity as an introductory computer, with hundreds of thousands of students gaining their initial programming experience on the IBM 1620.

The system employed core memory with cycle times of 20 microseconds in the original Model I, which was reduced to 10 microseconds in the Model II released in 1962—still considerably slower compared to contemporary main memory speeds.

Memory

The IBM 1620 Model I featured a variable-length decimal (BCD) architecture utilizing magnetic-core memory. Its core memory stored 20,000 decimal digits, each digit represented by six bits. Optional memory expansions included the IBM 1623 Storage Unit Model 1 (40,000 digits) and Model 2 (60,000 digits).

The Model II incorporated the IBM 1625 core storage unit, which cut the memory cycle time in half to 10 μs (100 kHz), enhancing performance relative to the Model I and its associated 1623 units.

Although five-digit addressing theoretically supported access to up to 100,000 decimal digits, no configurations exceeding 60,000 digits were commercially offered.

Memory access

Memory access occurred two decimal digits at a time—either as pairs of even-odd digits for numeric data or as single alphameric characters for textual information. Each six-bit digit consisted of an odd parity Check bit, a Flag bit, and four BCD bits:

  C F 8 4 2 1

The Flag bit fulfilled several roles:

• Signified negative values (using signed magnitude) in the least significant digit.
• Identified the most significant digit of a number (referred to as a word mark).
• Indicated indirect addressing within five-digit addresses (mandatory on Model II; optional on Model I), enabling multi-level indirection.
• Selected one among seven index registers via the middle three digits of addresses on the Model II.

Three special digit patterns (excluded from arithmetic operations) were defined:

  C F 8 4 2 1
      1 0 1 0 — Record Mark (end-of-record indicator)
      1 1 0 0 — Numeric Blank (used for punched card formatting)
      1 1 1 1 — Group Mark (group delimiter for disk I/O)

Instructions had a fixed length of twelve decimal digits, composed of a two-digit operation code, a five-digit "P Address" (typically destination), and a five-digit "Q Address" (usually source or immediate value). Some instructions utilized only the P Address; later assemblers introduced "B7" instructions featuring seven-digit branch addresses to align subsequent instructions properly.

Fixed-point data words ranged from two digits up to nearly all available memory capacity. Floating-point words—supported via an optional hardware feature—varied from four to one hundred and two digits in length (two digits for exponent plus two to one hundred for mantissa).

The Fortran II compiler provided limited control over data sizes through a "Source Program Control Card," which specified mantissa length, fixed-point digit count, and memory allocation for code execution.

This machine did not include programmer-accessible registers; all operations were performed directly between memory locations, including those involving the Model II’s index registers.

Refer to Architectural difficulties section

Character and operation codes

The following table presents the characters and operation codes used in Alphameric mode.

... [table continues with similar pattern, focusing on key mnemonics and operations relevant to business applications] ...

BCD character	Typewriter		Printer	Tape		Card		Core		MNEMONIC and operation	Description and remarks
	Input	Output	Output	Input	Output	Input	Output	Even	Odd
Blank	|   | C | C |   |   | |   |   |
invalid	Ж ❚ | colspan=5 |   | | 1 | FADD Floating Add | Optional capability.
.	. | . | X0 8 21 | X0 8 21 | 12-3-8 12-1-2-8 | 12-3-8 | | 21 | FMUL Floating Multiply | Optional capability.
+	+ | + | X0C | X0C | 12 | 12 | 1 |   | BTAM Branch and Transmit Address Immediate (Model II)
$	$ | $ | X C8 21 | X C8 21 | 11-3-8 11-1-2-8 | 11-3-8 | 1 | 21 | MM Multiply Immediate
*	* | * | X84 | X84 | 11-4-8 | 11-4-8 | 1 | 4 | CM Compare Immediate
invalid	Ж ❚ | colspan=5 |   | 1 | 42 | TFM Transmit Field Immediate |
-	- |- |- |- |- |- |- |- BTA Branch and Transmit Address (Model II)
/
invalid
,
(

Below is the list of numeric mode characters.

... [table continues with key numeric characters and their codes] ...

Character	Typewriter		Printer		Tape		Card		Core	Description and remarks
	Input	Output	Output	Dump	Input	Output	Input	Output
Blank	0	0	0	C	0		0	C

Invalid character

On the IBM 1620 Model I, the typewriter employed the Cyrillic script character Ж (pronounced "zh") as a general invalid character with correct parity, while invalid parity was shown by an overstrike "–". In certain setups, this character was nicknamed SMERSH, inspired by the popular late 1960s James Bond novels. The IBM 1620 Model II replaced this with a new symbol ❚ ("pillow") to serve the same function.

Architectural challenges

Although the IBM 1620 gained popularity in scientific and engineering fields, its architecture presented certain limitations highlighted by computer scientist Edsger Dijkstra in his EWD37 paper, "A review of the IBM 1620 data processing system". A key restriction involved its Branch and Transmit instruction, which supported only a single level of nested subroutine calls, compelling programmers to carefully navigate this constraint. Furthermore, the device's paper tape reader was unable to accurately process record marks, complicating tape duplication since record marks signify the end of characters stored. This problem was addressed by transferring data to the memory's end and punching it exactly using a DN instruction instead of WN, with many tape copies performed offline to alleviate the issue.

In practice, most IBM 1620 setups preferred punched card input/output over paper tape due to greater ease of use.

The IBM 1620 was eventually replaced by the IBM 1130, which featured a 16-bit binary design while continuing to support one peripheral from the 1620—the IBM 1627 drum plotter.

Software

IBM supplied the following software packages for the 1620:

• 1620 Symbolic Programming System (SPS) (assembly language)
• FORTRAN
• FORTRAN II, which required a minimum of 40,000 digits of memory

• GOTRAN, a simplified interpreted FORTRAN variant designed for immediate "load and go" usage
• Monitor I and Monitor II disk operating systems that provided disk-based implementations of 1620 SPS IId, FORTRAN IId, and a Disk Utility Program (DUP). Both systems demanded at least 20,000 digits of memory and one or more 1311 disk drives.

A comprehensive set of IBM 1620 manuals is accessible in PDF format through bitsavers.

Non-decimal arithmetic on the 1620

The Model I utilized in-memory lookup tables for addition and subtraction, allowing limited unsigned arithmetic in bases ranging from 5 to 9 by adjusting these tables. Despite this flexibility, the hardware incorporated a ten's complementer to handle subtraction and addition involving numbers with opposite signs.

Executing fully signed addition and subtraction within bases 2 to 4 necessitated intricate "folded" addition tables to circumvent the complementer and carry logic. Because address computations required base-10 operation, the addition table had to be reloaded frequently, restricting practical application.

In contrast, the Model II performed addition and subtraction entirely via hardware, eliminating the possibility of modifying tables for alternative bases. Nevertheless, it included an optional hardware feature supporting octal input/output, logical instructions, and conversions between decimal and octal bases. This capability made Model II particularly suitable for processing octal-formatted data originating from systems such as the IBM 7090.

Model I

The IBM 1620 Model I (1959–1962) represented the initial version prioritizing affordability.

• It did not contain a traditional ALU; instead, arithmetic operations relied on memory table lookups. Addition and subtraction utilized a 100-digit table located at addresses 00300–00399, multiplication referred to a 200-digit table at addresses 00100–00299. Division was handled through software routines unless optional division hardware was installed. Floating-point instructions were available as an option alongside the divide feature.
• The first 20,000 decimal digits of magnetic-core memory were integrated within the CPU itself to reduce floor space requirements. Memory capacity could be expanded to 40,000 or 60,000 digits with an IBM 1623 Memory unit. The memory cycle time measured 20 μs (equivalent to 50 kHz). Each memory read, clear, or write operation took 2 μs within that cycle.
• The processor clock operated at 1 MHz, divided by a factor of 20 using a 10-position ring counter for system timing purposes. Fetching instructions required eight memory cycles (160 μs), with execution time varying based on instruction complexity. Indirect addressing added four additional cycles (80 μs) per level of indirection.
• The entire system weighed approximately .

Model II

Launched in 1962, the IBM 1620 Model II offered notable enhancements in both capability and speed compared to its predecessor, Model I.

• It incorporated fundamental ALU hardware to perform addition and subtraction directly; however, multiplication continued to be handled through an in-memory lookup using a 200-digit table (addresses 00100–00299). This modification liberated memory locations (00300–00399) to accommodate two switchable sets of seven five-digit index registers.
• Hardware support for division became standard, replacing the optional feature found in Model I. Optional capabilities included floating-point calculations, octal input/output, logical operations, and instructions for base conversion.
• The core memory resided entirely within the IBM 1625 unit, featuring a faster cycle time of 10 μs (100 kHz), effectively doubling the speed of Model I. Each memory operation required 1.5 μs within this cycle.
• The processor’s clock frequency was increased to 2 MHz but remained divided by 20 to generate timing and control signals. The fetch/execute system was redesigned to improve efficiency by allowing partial instruction fetches when certain fields were not needed. Instruction fetch durations were shortened to 1, 4, or 6 cycles (10–60 μs). Indirect addressing added three cycles (30 μs) per level of indirection, while indexed addressing added five cycles (50 μs) per index level. Both addressing modes could be utilized simultaneously at any level of indirection or indexing.

Models I and II consoles

Although the Lower console components of both IBM 1620 Model I and Model II systems were identical in terms of lamps and switches, their respective Upper consoles exhibited distinct designs.

Upper console

Model I (Upper console)	#Lamps	Model II (Upper console)	#Lamps
Instruction and Execute Cycle	60	Control Gates	60
Control Gates	35	Input-Output	35
Input-Output	15	Instruction & Execute Cycle	15

The following Upper console elements were common across both models:

• Operation Register – equipped with 25 lamps
• Memory Buffer Register – displayed with 30 lamps
• Memory Address Register – contained 25 lamps
• Memory Address Register Display Selector – a rotary switch with twelve positions

Lower console

• Emergency Off Pull switch
• Status indicators and switches for Check Condition – comprising 15 lamps and five toggle switches
• Program control toggles – four switches
• Console operator interface – including thirteen indicator lights, one power switch, and twelve buttons

Console typewriter

The Model I console utilized a modified IBM Electric Model B1 typewriter connected through relay interfaces, capable of typing at a rate of ten characters per second. It supported instructions designed for reading and writing both numeric and alphanumeric data:

• WNTY: Outputs numeric characters (digits 0–9) from memory to the typewriter
• WATY: Outputs alphanumeric characters by reading pairs of memory locations
• RNTY: Accepts numeric input from the typewriter keyboard
• RATY: Accepts alphanumeric input from the keyboard
• TBTY: Executes tabulation function (infrequently employed due to manual tab stops)
• RCTY: Performs carriage return and line feed operations

To assist with input/output data conversions, two additional instructions were implemented:

• TNS: Transmit Numeric Strip – transforms two-digit alphanumeric representations of "0"–"9" into single-digit numerics
• TNF: Transmit Numeric Fill – converts single-digit numerics back into two-digit alphanumeric format

The Model II enhanced this setup by adopting a modified IBM Selectric typewriter, which increased typing speed by approximately 55%, reaching 15.5 characters per second.

Peripherals

The range of peripherals available comprised:

• IBM 1621 Paper tape reader
• IBM 1622 Punch card reader and punch
• IBM 1624 Paper tape punch (installed within the 1621 unit)
• IBM 1626 Plotter controller
• IBM 1627 Plotter device
• IBM 1311 Disk drive system: Model 3 master managing up to three Model 2 slave units
• IBM 1443 Printer with a flying type bar mechanism
• IBM 1405 Disk drive accessible as an RPQ (request price quotation)

Typical program output was generated using punched cards, which provided faster results compared to typewriter output. These punched cards were processed through the IBM 407 mechanical calculator, capable of producing two cards simultaneously by utilizing extra print columns. Since output was synchronous, the processor halted during input/output operations, and typewriter output frequently consumed most of the runtime.

Introduced on May 6, 1963, the IBM 1443 printer offered a quicker output alternative. Compatible with both IBM 1620 models, it printed at speeds ranging from 150 to 600 lines per minute. The device supported either 120 or 144 columns with fixed-width characters; paper width was adjusted accordingly (10 characters per inch, with widths up to 12 or 14.4 inches). Featuring a buffer, it minimized processor I/O delays; however, print instructions would block if a line remained incomplete.

Operating procedures

The system’s "operating system" was effectively the human operator, who utilized controls on the console—comprising a front panel and a typewriter—to load programs from bulk storage media such as punched cards or paper tape kept nearby. With the later addition of the IBM 1311 disk storage unit, dependence on card decks or tape reels diminished, allowing a simple "Monitor" operating system to facilitate program selection directly from disk.

A routine startup procedure involved clearing memory from any residual data since magnetic core memory retained information even when powered down. This was accomplished by typing and executing a straightforward machine code program via the console typewriter that filled memory locations with zeros until manually halted. Clearing each memory module of approximately 20,000 digits took just under one second. On the IBM 1620 Model II, this process was replaced by pressing console buttons labeled "Modify" and "Check Reset," which cleared all memory in about a tenth of a second and automatically stopped.

Programs could be loaded either by entering machine code manually at the console or by using peripheral devices such as paper tape readers, card readers, or disk drives. When loading from tape or disk, an initial bootstrap routine had to be entered via the console typewriter. The card reader simplified this step by providing a dedicated "Load" button that read and executed the first card at address 00000, triggering the bootstrap sequence that loaded the remainder of the program.

Typically, programs were prepared offline on punched cards or paper tape but were run interactively by programmers themselves rather than being submitted to operators as in larger mainframe environments of that time. The console typewriter supported interactive data input and output beyond simple batch processing. Four program switches on the console enabled running programs to query switch states and modify their behavior accordingly. Operators had the ability to halt execution, examine or alter memory contents—made easier due to decimal-based addressing—and then resume running from any point. This interactive control environment was particularly suited for exploratory scientific programming rather than repetitive commercial data processing tasks.

Console

The IBM 1620 console incorporated essential control buttons designed for system operation and troubleshooting, primarily featuring two keys marked Insert and Release, accompanied by the console typewriter.

• Insert – When in Manual mode, activating this button reset the program counter to zero, transitioned the system into both Automatic and Insert modes, and emulated a Read Numeric operation from the typewriter directed at address zero. This action unlocked the keyboard and switched it into numeric input mode. To safeguard arithmetic tables from accidental overwrites, the Insert mode automatically triggered a Release after 100 digits were entered.
• Release – Pressing this during a typewriter read operation ended the read sequence, reverted the system to Manual mode, and locked the keyboard.

The typewriter functioned as an interface for operator input/output as well as program-driven I/O. Subsequent versions introduced an R-S key that combined the functions of Release and Start, effectively acting like an Enter key. It is important to note that keys such as Tab and Return did not produce input characters because of the constraints of the character set.

Other console controls included:

• Start – In Manual mode, this switched the computer to Automatic, commencing execution at the current program counter.
• Stop-SIE – While in Automatic, pressing this changed the mode to Manual after completing the ongoing instruction; when in Manual, it executed a single instruction under Automatic mode.
• Instant Stop-SCE – In Automatic, this shifted to a combined Automatic/Manual state following completion of the current memory cycle; in other modes, it executed one memory cycle.

For debugging purposes:

• Save – In Manual, this stored the program counter value into a MARS core register and enabled Save mode. This facilitated resuming execution after debugging commands were manually entered by the operator. It is worth mentioning that this register shared its location with the multiply instruction, so multiplication was avoided during debugging sessions.
• Display MAR – In Manual, this displayed both the selected MARS register and corresponding memory content via console indicator lamps.

The console also supported a comprehensive breakpoint mechanism using these controls, allowing users to set, execute, and clear breakpoints by modifying instructions through the typewriter.

Clearing main memory was possible directly from the console by running a transfer instruction that overwrote word marks and wrapped memory addresses; pressing Stop terminated this process once it had completed.

IBM 1621/1624 Paper Tape Reader/Punch

The IBM 1621 Paper Tape Reader operated at speeds up to 150 characters per second, whereas the IBM 1624 Paper Tape Punch could output up to 15 characters per second.

Both devices shared these features:

• Utilized eight-channel paper tape
• Incorporated self-checking capabilities to ensure accuracy
• Supported single-character coding for both numeric and alphabetic data

Control elements included:

• Power switch – Activates power to the reader when the CPU is running.
• Reel-Strip switch – Allows selection between tape reels or strips.
• Reel power key – Supplies power to both supply and take-up reels to position tape properly and prepare the reader.
• Non-process runout key – Advances tape until fully unwound, removing the reader from ready status.

Bootstrap procedure	Notes
Press Insert	Unlocks keyboard and sets numeric input mode.
Type 36xxxxx0030049yyyyy	xxxxx represents load address; yyyyy indicates execution start address.
Press Release	Locks keyboard.
Press Start	Initiates program execution.

IBM 1622 Card Reader/Punch

The IBM 1622 Card Reader/Punch was capable of processing up to 250 cards per minute in reading mode and could punch cards at a rate of 125 per minute.

Its controls were organized into three categories: punch rocker switches, buttons, and reader rocker switches:

Punch Rocker Switches:

• Punch Off/On – Activates or deactivates the punching function.
• Select No-Stop/Select Stop – Determines whether punching errors cause the operation to halt or continue.
• Non-Process Runout – Allows remaining cards to be processed when the punch hopper becomes empty.

Buttons:

• Start punch – Initiates punching when the device is idle and punching is enabled.
• Stop punch – Ceases punching during active operation.
• Check Reset – Resets error states in both reader and punch mechanisms.
• Load – In Manual mode with the reader idle and powered on, this starts the reader, resets the program counter to zero, reads a single card into the buffer, performs error checking, simulates execution of a Read Numeric instruction from card reader address zero, then switches to Automatic mode.
• Stop reader – Halts the reader while it is running.
• Start reader – Starts the reader when idle and powered on, reads one card into the buffer, and verifies for errors.

Reader Rocker Switches:

• Non-Process Runout – Processes remaining cards when the read hopper is empty.
• Reader Off/On – Turns the reader mechanism power off or on.

Bootstrap procedure	Notes
Press Load

Disk drives

The 1311 disk drive featured several control elements:

• Module light – displays drive number and indicates readiness for data access.
• Compare-Disable key-switch (Master only) – permits writing an entire track without address comparison, typically used during disk pack formatting.
• Select Lock light (Master only) – signals a drive fault, preventing disk access.
• Write Address button/light (Master only) – toggles whether sector addresses are written.
• Enable-Disable toggle-switch – controls drive accessibility; disabling the Master drive disables all drives and stops disk usage time meters.
• Start Stop button – controls motor operation; motor must be stopped before opening the drive lid to change disk packs.

Bootstrap procedure	Notes
Press Insert	Unlocks keyboard and switches to numeric input mode.
Type 3400032007013600032007024902402 x y1963611300102	x designates Monitor control cards source: 1=typewriter, 3=paper tape, 5=cards y specifies Monitor-associated disk drive: 1, 3, 5, or 7 02402 indicates Monitor entry point address.
Press Release	Locks keyboard.
Press Start	Begins program execution.

Restart procedure	Notes
Press Insert	Unlocks keyboard and enters numeric mode.
Type 490225FLG6	02256̅ is the Monitor program restart address. Assumes Monitor is resident in memory.
Press Release	Locks keyboard.
Press Start	Starts execution.

General

While considered cumbersome by today’s standards, both the FORTRAN II compiler and SPS assembler became manageable with practice.

FORTRAN II compilation procedure	Notes
Set Program Switches OFF for no source listing, no batch compilation; source from cards; unused option set accordingly.	Pass I configuration
Set Overflow Check switch to Program; other switches set to Stop.
Press Reset
Load blank cards into Punch hopper; press Punch Start.
Load Pass I compiler deck into Read hopper; press Load.	Await prompt "ENTER SOURCE PROGRAM, PRESS START".
Remove Pass I deck from Read stacker.
Load source program deck into Read hopper; press Start.	Wait until Pass I completes successfully.
Toggle Program Switch 1 OFF or ON for symbol table listing; press Start.
Set Program Switches OFF for no statement/address listing or trace options.	Pass II configuration
Set Overflow Check switch to Program; others to Stop.
Press Reset
Load blank cards into Punch hopper; press Punch Start.
Load Pass II compiler deck into Read hopper; press Load.
Remove Pass II deck from Read stacker.
Load intermediate Pass I output into Read hopper; press Reader Start then Start.
Switch Program Switch 1 ON; load Subroutine deck; press Reader Start then Start again.
Remove Subroutine and Object decks from stackers once compilation finishes.

GOTRAN simplified usage by directly producing executable memory images but did not implement full FORTRAN functionality.

Third-party compilers enhanced usability significantly. For example, Bob Richardson at Rice University created the FLAG (FORTRAN Load-and-Go) compiler. FLAG stayed resident in memory after loading, enabling quick processing of multiple small jobs by loading only source decks. This method improved throughput compared to later disk-based machines such as the IBM 1130, particularly in educational institutions like Auckland University.

The advent of disk storage eliminated dependence on card decks for working storage. Compiler and loader components could reside on disk and be accessed via straightforward disk-based operating systems, streamlining workflows.

Since card reader-punch units did not print characters across card tops, output decks required separate processing on devices like the IBM 557 Alphabetic Interpreter to produce readable listings. Typically, listings were generated by punching decks followed by printing using an IBM 407 accounting machine.

Hardware implementation

The IBM 1620's logic was predominantly constructed using a variant of resistor–transistor logic (RTL) that incorporated "drift" transistors, which IBM labeled as Saturated Drift Transistor Resistor Logic (SDTRL) due to their enhanced speed. Additional circuit classifications included Alloy (primarily for non-logic roles), CTRL (a slower form of RTL), CTDL (diode–transistor logic), and DL (RTL combined with drift transistors). Voltage levels typical to these circuits differed by type, with SDTRL circuits functioning at transmission line logic voltages of 1 V for high and -1 V for low.

These circuits were assembled from discrete components mounted on single-sided paper-epoxy printed circuit boards, each equipped with 16-pin gold-plated edge connectors and referred to as SMS cards (Standard Modular System). Each SMS card contained logic equivalent to a single 7400 series SSI or simple MSI integrated circuit, generally comprising 3 to 5 gates or a small number of flip-flops.

The SMS cards were installed in socketed, door-like racks known as gates. The fundamental machine layout consisted of:

• "Gate A" – a forward-hinged gate that swung out the rear after "Gate B"
• "Gate B" – hinged at the rear, also swinging out the back
• "Gate C" – a sliding gate extending out the back; housed the console typewriter interface and mostly relay-based logic
• "Gate D" – another sliding gate at the back; provided the standard input/output interface

Two types of core memory were utilized in the 1620:

• Main memory
  • Addressing via Coincident Current X-Y Lines
  • Available in capacities of 20,000, 40,000, or 60,000 digits
  • Organized into 12-bit even-odd digit pairs distributed across 12 one-bit planes per module; configurations ranged from one to three modules
  • Each plane contained 10,000 magnetic cores
• Memory Address Register Storage (MARS)
  • Word line addressing supporting 16 words (with a minimum of eight in the basic setup)
  • Allowed single-word read operations and multi-word clear/write cycles
  • Employed a 24-bit five-digit decimal memory address (excluding the ten-thousands digit)
  • Comprised a single plane with 384 cores

For main memory address decoding, two planes of 100 pulse transformer cores per module were used to produce X-Y line half-current pulses.

The IBM 1620 was released in two hardware versions:

• IBM 1620 I
• IBM 1620 II

Targeting the "small scientific market"

In 1958, IBM assembled a development group at its Poughkeepsie, New York facility aimed at addressing the "small scientific market." This team was led by Wayne Winger alongside Robert C. Jackson and William H. Rhodes.

Design goals and specifications

At that time, competitors such as the Librascope LGP-30 and Bendix G-15, both utilizing drum memory technology, dominated the sector. IBM's smallest offering then was the IBM 650, a decimal machine with fixed word length that also relied on drum memory and vacuum tubes. IBM recognized the necessity of adopting innovations from larger systems but demanded cost-effective solutions to remain competitive.

The primary design criteria included:

• Implementation of core memory technology
• A limited instruction set omitting divide and floating-point operations; subroutines compensated for these functions
• Reduction in hardware complexity by shifting logical machine functions into software or tables stored in core memory (e.g., eliminating dedicated arithmetic circuits)
• Economical input/output options, avoiding punch cards and printers in favor of paper tape and a console typewriter

The prototype

The team, including Anne Deckman, Kelly B. Day, William Florac, and James Brenza, finalized the (codename) CADET prototype in the spring of 1959.

At the same time, IBM's San Jose facility developed an alternative design. Ultimately, the Poughkeepsie project was chosen due to its ability to support future expansion, unlike the more limited San Jose concept.

IBM 1620 Model I Level A (prototype), as depicted in IBM's official announcement.

Management expressed concerns about the reliability of core memory in smaller machines, leading Gerry Ottaway to create a backup drum memory. During testing, core memory failures were traced to a malfunctioning muffin fan generating noise pulses. After correcting this issue, core memory demonstrated dependable performance, resulting in the discontinuation of drum memory development.

Production moved to San Jose

Following the IBM 1620's announcement on October 21, 1959, internal restructuring shifted manufacturing responsibilities from Poughkeepsie's Data Processing Division to San Jose's General Products Division, which specialized in small-scale computers.

At San Jose, the codename CADET gained a humorous nickname: "Can't Add, Doesn't Even Try," referencing its use of addition tables rather than dedicated hardware circuitry. This nickname became well-known among users.

Implementation "levels"

• Model I
  • Level A; prototype stage.
    • All flip-flop circuits were transistorized versions of the Eccles-Jordan trigger circuit. While fully operational, capacitor coupling proved unreliable due to interference from noisy relays and cam-driven switches. This led to a complete redesign employing S-R flip-flops (except for two clock-generating triggers). The term Trigger persisted in documentation as IBM's standard nomenclature.
    • This level was unique for featuring a single-piece vertical control panel; later models adopted a two-piece angled panel after production moved from Poughkeepsie to San Jose.
  • Level B; initial production release.
    • The only level featuring a burnished aluminum lower control panel; subsequent versions used white finishes.
  • Level C; incorporated the 1622 card reader/punch.
  • Level D; added support for 1311 disk drives along with optional "Gate J" disk control logic.
  • Level E; introduced an optional Floating-Point feature.
  • Level F
  • Level G; brought in Interrupt capability (required for IBM 1710).
    • Did not support BT & BB subroutines within interrupt code.
    • Disk control logic from "Gate J" was merged into "Gate A" and "Gate B," enabled by condensed logic cards derived from Model II.
  • Level H; enhanced Interrupt feature supporting BT & BB subroutines.
    • Represented the final iteration of Model I.
• Model II

Introduced fundamental ALU hardware enabling addition and subtraction operations directly, removing previous limitations, and added index registers.

• Model III
  • Initiated development but was canceled as IBM redirected efforts toward promoting the new System/360 and phasing out older product lines.

Patents

US Patent 3,049,295 Multiplying Computer Filed: December 20, 1960 | Issued: August 14, 1962 Inventors: William H. Rhodes, James G. Brenza, Wayne D. Winger, Robert C. Jackson Claims: 21 | No prior art cited Documentation: 156 sheets of diagrams (comprehensive details on 1620), 31 sheets of text US Patent 3,328,767 Compact Data Lookup Table Filed: December 31, 1963 | Issued: June 27, 1967 Inventor: Gerald H. Ottaway Claims: 11 | Prior art includes 5 references Documentation: 5 sheets of diagrams, 4 sheets of text

US Patent 3,199,085 Computer with Table Lookup Arithmetic Unit Feature Filed: December 20, 1960 | Issued: August 3, 1965 Inventors: William H. Rhodes, James G. Brenza, Wayne D. Winger Claims: 21 | Prior art includes 5 references Documentation: 156 sheets of diagrams (full details on 1620), 31 sheets of text US Patent 3,239,654 Dividing Computer Filed: February 8, 1961 | Issued: March 8, 1966 Inventors: Robert C. Jackson, William A. Florac, Wayne D. Winger Claims: 9 | Prior art includes one reference | Publications cited: three Documentation: 13 sheets of diagrams, 19 sheets of text

Noteworthy Applications

At NASA Headquarters, Vearl N. Huff utilized an IBM 1620 model II to develop a three-dimensional Fortran simulation addressing the two-body problem involving the tethered Gemini capsule and Agena rocket module. This work focused on evaluating safety risks associated with elastic tether collisions. The same machine was also employed to simulate Gemini mission orbits, producing printed charts for detailed examination. These computational tasks were typically executed overnight to be available for review the following day.

The year 1963 saw the deployment of an IBM 1620 at IIT Kanpur, representing a significant advancement in India's software engineering landscape.

In 1964, Martin Ward at the Australian National University leveraged an IBM 1620 model I to determine the order of the Janko group J₁.

A film documenting a 1963 computer typesetting system at the Washington Evening Star was produced by the International Typographical Union in 1966, showcasing the use of an IBM 1620 alongside a Linofilm phototypesetter.

That same year, the University of Iceland installed its first computer, an IBM 1620, marking a milestone in Icelandic computing history.

Appearances in Film and Television

• From 1960 to 1963, DJ Rege Cordic created a radio show for KDKA Pittsburgh inspired by a baseball game simulator developed by IBM’s John Burgeson and his brother Paul, highlighting early computer simulation technology.
• The fictional Colossus computer featured in Colossus: The Forbin Project incorporated approximately twelve discarded IBM 1620 front panels sourced from surplus inventory.
• Similar IBM 1620 panels were used to represent the THRUSH supercomputer in a late-season episode and film adaptation of The Man from U.N.C.L.E..

CADET

Users affectionately dubbed the IBM 1620 as CADET, humorously expanded as "Can't Add, Doesn't Even Try" due to its design choice of utilizing addition tables stored in memory instead of dedicated hardware for addition operations.

For additional explanations regarding the machine's code name, refer to development history.

Internally, the code name CADET was assigned to the system. One engineer proposed it stood for "Computer with ADvanced Economic Technology," while others recall it being part of "SPACE - CADET", where SPACE was the internal designation for the IBM 1401, developed alongside it.

Bibliography

• — An early overview introducing the IBM 1620 and associated systems.

See also

• CDC 160, a desktop scientific computer introduced by Control Data Corporation in 1960
• CAB 500, a desktop scientific computer launched by Société d'Electronique et d'Automatisme in 1960

External links

• The IBM 1620 Data Processing System (archived 2004) from Computer History Museum
• IBM Archives: 1620 Data Processing System (archived) from IBM Archives Exhibits
• IBM 1620 documentation hosted at bitsavers.org
• System Reference Manual for IBM 1620 CPU Model 1 (July 1965) available at bitsavers.org
• System Reference Manual for IBM 1620 CPU Model 2 (November 1965) accessible at bitsavers.org
• IBM 1620 Simulator Java Applet part of the restoration initiative for the IBM 1620