IBM 7010

IBM 704x/709x register set
	Data registers
Accumulator	AC

IBM 700/7000 series
Company type	Computer hardware series
Industry	Computer mainframes
Predecessor	IBM 700 series (vacuum tube)
Founded	1950s
Successor	IBM System/360
Owner	IBM

The IBM 700/7000 series represents a collection of large-scale (mainframe) systems developed by IBM throughout the 1950s and early 1960s. This lineup encompasses several processor architectures that are not mutually compatible. The initial vacuum tube-based 700 models were replaced by the transistorized 7000 series, which in turn were succeeded by the System/360 announced in 1964. However, the first System/360 variant capable of substituting the 7000 series—the 360/65—did not become available until late 1965. Early difficulties with OS/360 and the significant expenses associated with software migration extended the operational lifespan of many 7000 machines.

Architectures

Within the IBM 700/7000 family, six unique data and instruction storage architectures were implemented:

Initial scientific architecture (36-bit words with 18-bit instructions): 701 (Defense Calculator)
Subsequent scientific systems (36-bit words featuring hardware floating-point support): 704, 709, 7040, 7044, 7090, 7094
Commercial architecture (variable-length character strings): 702, 705, 7080
1400 series architecture (variable-length character strings): 7010
Decimal architecture (10-digit words with hardware floating-point): 7070, 7072, 7074
Supercomputing architecture (64-bit words with hardware floating-point): 7030 "Stretch"

The transition from vacuum tube technology in the 700 series to transistor-based designs occurred with the introduction of the 7000 series. While most models utilized magnetic-core memory, early units such as the 701 and 702 initially relied on Williams tube CRT memory before upgrading to core memory.

Software compatibility challenges

The existence of multiple distinct mainframe architectures compelled IBM to maintain separate software development tracks, complicating programming efforts as operating systems evolved.

The System/360 consolidated essential elements from both the 7000 and 1400 series into a single platform supporting commercial and scientific workloads. Despite lacking direct architectural compatibility with earlier systems, some System/360 models incorporated microcode-driven emulation to support legacy instruction sets. The subsequent System/370, launched in mid-1970, enhanced these emulation features by enabling legacy software to run under system control without requiring shutdowns and restarts, thereby improving backward compatibility for applications originating from the IBM 1400 and 7000 families.

Peripheral devices

Although architectural differences existed, machines within each class shared similar electronic components and peripheral equipment. Magnetic tape drives commonly employed IBM's 7-track format, with vacuum tube models using the IBM 727 and transistorized models adopting the IBM 729. Both vacuum tube and most transistor-based systems utilized card readers, punches, and line printers originally introduced with the IBM 701—specifically the IBM 711, 721, and 716—which were based on IBM accounting machine designs featuring plugboard control panels. Due to their relatively slow processing speeds, numerous installations of the 7000 series incorporated an IBM 1401 to manage faster off-line card-to-tape and tape-to-printer operations. Later models such as the 7010, 7040, and 7044 integrated peripherals derived from the midrange IBM 1400 series. Additionally, some technologies developed for the 7030 were applied to data channels and peripheral devices in other members of the 7000 family, including the IBM 7340 Hypertape.

Initial scientific architecture (701)

Initially referred to as the Defense Calculator during its development phase at IBM's Poughkeepsie Laboratory, this system was officially introduced on April 7, 1953, under the name IBM 701 Electronic Data Processing Machine.

Data formats

The numerical values were represented using either 36-bit or 18-bit lengths, exclusively employing fixed-point binary sign/magnitude encoding.

Instruction format

The instruction length was fixed at 18 bits with a single address field:

Sign (1 bit) – indicated whether the operand address referred to a full word (-) or half word (+)
Opcode (5 bits) – allowed for 32 distinct instructions
Address (12 bits) – capable of addressing 4096 half-word locations

A special 33rd instruction extended the memory capacity from 2048 to 4096 words by utilizing the highest bit in the address field as a bank selector.

Registers

AC – a 38-bit Accumulator
MQ – a 36-bit Multiplier-Quotient register

Memory

Configured with either 2,048 or 4,096 words of 36-bit binary storage, each word contained six-bit characters.

Subsequent scientific architecture (704/709/7090/7094)

IBM’s 36-bit scientific architecture underpinned computation-heavy tasks across vacuum tube systems like the IBM 704 and IBM 709, progressing to transistorized models such as the IBM 7090 and 7094, along with more economical variants including the IBM 7040 and 7044. The Direct Coupled System (DCS) represented the apex of this architecture by interconnecting a 7094 with a 7044 to delegate input/output processing.

Data formats

Numbers were encoded in 36 bits for both fixed-point (binary sign/magnitude) and floating-point representations:

Single-precision floating-point: included a sign bit for magnitude, an 8-bit excess-128 exponent, and a 27-bit magnitude
Double-precision floating-point (introduced with the 7094): comprised a sign bit for magnitude, a 17-bit excess-65536 exponent, and a 54-bit magnitude
Alphanumeric characters employed IBM’s proprietary six-bit BCD, packed six characters within each word

Instruction format

Instructions consisted of four fields: a three-bit prefix, a fifteen-bit decrement, a three-bit tag, and a fifteen-bit address. The prefix defined the instruction category; the decrement often held immediate operands or further specified instruction variants. The tag selected index registers whose contents were subtracted from addresses to compute effective addresses. The address field contained either an operand or an immediate value.

Registers

Additional registers included:

XR – Index registers of fifteen bits each (ranging from three to seven)
SI – Thirty-six-bit Sense Indicator register

The accumulator and multiplier-quotient registers used sign/magnitude representation along with overflow bits Q and P. Logical operations either reset or disregarded these bits. Index registers utilized two's complement notation and their values were subtracted from instruction addresses. For machines equipped with multiple index registers, the selected registers’ contents were combined via OR before subtraction. The IBM 7094 supported various tag modes to ensure compatibility with earlier software.

Sense Indicators facilitated user interaction through panel switches and indicator lights.

Memory

IBM 704 offered configurations of 4,096, 8,192, or 32,768 thirty-six-bit words containing six-bit characters
Models from IBM 709 onwards (including the 7090/7094/7040/7044) standardized on a fixed memory size of 32,768 thirty-six-bit words with six-bit character encoding

Input/output

The IBM 709/7090 family utilized Data Synchronizer Channels (DSCs) to manage high-speed input/output devices such as tape drives and disk units. Basic seven-bit DSCs ran simple control programs for data transfer between memory and peripherals, while advanced nine-bit DSCs supported more sophisticated channel programming. Due to slow unit record devices on these systems, punched card input/output and high-speed printing commonly depended on off-line magnetic tape transfers via an IBM 1401 system. Later setups combined a high-performance model (e.g., IBM 7090) with a lower-cost system (e.g., IBM 7040) through data channels to form the IBM 7094/7044 Direct Coupled System (DCS), where the smaller machine managed rapid peripheral I/O tasks.

FORTRAN assembly program

The FORTRAN Assembly Program (FAP) served as an assembler tailored for the IBM 709, 7090, and 7094 systems. Created at the Western Data Processing Center by David E. Ferguson and Donald P. Moore specifically for the IBM 709, it functioned under IBM's Fortran Monitor System (FMS) as well as the IBSYS operating environments. Prior to FAP, assemblers such as the SHARE Compiler-Assembler-Translator (SCAT) operated under the SHARE Operating System (SOS). Bell Laboratories later augmented FAP by incorporating macro capabilities, resulting in BE-FAP. This evolution culminated in the Macro Assembly Program (IBMAP), the definitive assembler for the 7090/7094 platforms running under IBSYS/IBJOB. Notably, SCAT, FAP, and MAP were incompatible with one another.

The pseudo-operation BSS, designed to allocate memory space, gave rise to the term "BSS section", a designation still widely used in numerous assembly languages to indicate reserved memory areas excluded from executable files.

Commercial architecture (702/705/7080)

The IBM 702 and IBM 705 share many similarities; however, while the 705 is capable of executing most 702 programs without alteration, it does not guarantee full compatibility.

The IBM 7080 represents a transistor-based enhancement of the 705, delivering various performance improvements. To maintain backward compatibility, it supports several operational modes: 705 I, 705 II, 705 III, and its native full 7080 mode.

Data format

Information is stored as variable-length character strings that conclude with a Record mark.

Instruction format

Instructions consist of five characters: one opcode character followed by four address characters – formatted as OAAAA.

Registers

702: Equipped with two accumulators (A and B), each capable of holding 512 characters
705: Contains a single accumulator (256 characters), fourteen auxiliary storage units (each 16 characters), plus an additional auxiliary unit of 32 characters
7080: Features one accumulator (256 characters), thirty auxiliary storage units (512 characters each), and thirty-two communication storage units (8 characters each)

Memory

702: Memory ranges from 2,000 to 10,000 characters using Williams tubes, expandable in increments of 2,000; character cycle time is approximately 23 microseconds
705 (models I through III): Core memory capacity spans from 20,000 to 80,000 characters; cycle times are either 17 or 9.8 microseconds
7080: Offers either 80,000 or 160,000 characters of core memory with a cycle time of about 2.18 microseconds

Input/output

Both the IBM 705 and standard IBM 7080 utilize channels with a 7-bit interface. The IBM 7080 can also be outfitted with 7908 data channels that support faster peripherals via a 9-bit interface.

1400 series architecture (7010)

The commercial architectures of the IBM 700/7000 series influenced the design of the popular IBM 1400 series—a line of mid-sized business computers. Subsequently, IBM released a mainframe variant known as the IBM 7010 based on the IBM 1410 architecture.

Data format

Information is stored as variable-length character strings terminated by a word mark.

Instruction format

Instructions vary in length and may consist of 1, 2, 6, 7, 11, or 12 characters.

Registers

Fifteen fixed low-memory locations contain five-character fields that act as index registers augmenting instruction addresses. Additionally, internal registers such as the B address register—which facilitates subroutine linkage—are accessible to programmers.

Memory

Total memory capacity is approximately 100,000 characters

Decimal architecture (7070/7072/7074)

The IBM 7070, IBM 7072, and IBM 7074 models are decimal-based computers featuring fixed-length words composed of ten decimal digits, though their instruction sets are not compatible with that of the IBM 650.

Data Representation

Word size – consists of 10 decimal digits plus a sign
Digit encoding method – utilizes the two-out-of-five code
Floating-point support – optional, includes a two-digit exponent
Three distinct signs per word – Plus, Minus (numeric), and Alpha (text encoded via digit pairs)

Instruction Structure

Instructions occupy a single word
Opcode – two digits accompanied by a sign (Plus or Minus)
Index register identifier – two digits
Field control – two digits specifying digit selection and shifting
Address field – four digits

Registers

Each register is one word and accessible as memory locations
Accumulators – three in total (standard addresses 9991-9993; expanded in 7074)
Program register – one, located at address 9995 by default (expanded in 7074), accessible via console, holds the current instruction
Instruction counter – single register at address 9999 standard (also extended in 7074), console-accessible
Index registers – ninety-nine, occupying addresses 0001 through 0099

Memory Specifications

Standard capacity ranges from 5,000 to 9,990 words; the IBM 7074 supports up to 30,000 words in extended configurations
Access times are 6 microseconds for the 7070 and 7072, and 4 microseconds for the 7074
Addition operation timing varies from 72 microseconds on the 7070 to as low as 10 microseconds on the 7074

Input/Output Interfaces

Employs channels with a standard 7-bit interface; optionally, higher-speed peripherals connect via a 9-bit interface on the 7907 data channels for models 7070 and 7074.

Timeline

Year	Category				Logic Technology	Memory Type
Year	Decimal	Commercial	Scientific	Supercomputer	Logic Technology	Memory Type
1952			IBM 701		vacuum tube technology	Williams tube memory
1953		IBM 702				Williams tube memory
1954		IBM 705	IBM 704			core memory
1958			IBM 709
1958	IBM 7070				transistor circuits
1959			IBM 7090
1960	IBM 7074
1961	IBM 7072	IBM 7080		IBM 7030
1962		IBM 7010	IBM 7094
1963			IBM 7040 IBM 7044
1964			IBM 7094 II

In the year 1962, the U.S. Internal Revenue Service operated an IBM model 7074.

Despite its designation, the IBM 7700 Data Acquisition System, introduced in December of 1963, does not belong to the IBM 7000 series.

Performance

The IBM 700 and 7000 series were developed before standardized performance metrics such as the Whetstone (introduced in 1972), Dhrystone (1984), and LINPACK (1979) came into use.

The following table presents speed evaluations by Gibson and Knight (where higher values indicate better performance) alongside TRIDIA program execution times in seconds (where lower values are preferable).

Model	Gibson Mix KIPS	Knight Index Scientific	TRIDIA Program (FORTRAN) (Seconds)
IBM 705 m1,2	0.50
IBM 705 m3	0.38
IBM 709	21
IBM 7030		372	15.58
IBM 7040			148
IBM 7044	[1]		74
IBM7090	[2]		66
IBM7094		[3]	31.35
IBM7094 II	[4]	[5]	16.50

External links

Reference manuals

701
702
704
705
7010
7030
7040/7044
7070/7072/7074
7080
7090/7094