Jump to content

PowerPC 7xx

From Alfawiki
PowerPC 7xx series
Company typeMicroprocessor series
IndustrySemiconductor
FoundedNovember 10, 1997; 29 years ago (1997-11-10)
FounderIBM, Motorola
Products32-bit PowerPC microprocessors (PowerPC G3)

The PowerPC 7xx series represents the third generation of 32-bit PowerPC microprocessors developed collaboratively by IBM and Motorola (later known as Freescale Semiconductor, which was acquired by NXP Semiconductors). Marketed by Apple Inc. as the PowerPC G3, this line was first introduced on November 10, 1997. Multiple manufacturers produced processors under the "PowerPC G3" brand, which powered a range of Apple products including the PowerBook G3, colorful iMac models, iBook laptops, and desktops such as the beige and blue-and-white Power Macintosh G3. Its combination of low energy consumption and compact form factor made it particularly suitable for portable computers, with the "G3" designation last appearing in the iBook lineup.

Outside of Apple's ecosystem, the 7xx processors saw widespread adoption in embedded applications like printers, routers, storage solutions, spacecraft systems, and gaming consoles. Nevertheless, this family did not support SMP, lacked SIMD instruction sets, and featured a relatively modest FPU. These shortcomings were addressed in Motorola’s follow-up PowerPC G4 (74xx) series.

The manufacturing technology for these chips evolved from 250nm down to 100nm fabrication processes.

PowerPC 740/750

Launched in late 1997 as an advancement over the PowerPC 603e, the PowerPC 740 and 750 (code-named Arthur) introduced a faster system bus running at 66 MHz, expanded L1 caches (32 KB each for instructions and data), an additional integer unit, improved floating-point capabilities, and higher clock speeds. The PowerPC 750 offered support for optional external unified L2 caches ranging between 256 KB and 1024 KB, managed by an integrated cache controller on the chip and accessed via a dedicated 64-bit bus.

Both variants utilized dynamic branch prediction techniques featuring a 512-entry branch history table alongside a 64-entry branch target instruction cache to enhance instruction throughput.

With a transistor count of approximately 6.35 million, early IBM and Motorola versions were produced using a 0.26 μm aluminum-based fabrication process. These chips operated at speeds up to 366 MHz while consuming around 7.3 W of power within a die measuring 67 mm2. By 1999, IBM transitioned to a more advanced 0.20 μm copper interconnect process, enabling clock frequencies up to 500 MHz, reducing power consumption to roughly 6 W, and shrinking die size to about 40 mm2.

At launch, the PowerPC 740 surpassed the contemporary Pentium II in performance while also offering lower power usage and a smaller die footprint. The inclusion of an off-chip L2 cache on the PowerPC 750 enhanced performance by an estimated 30%. This strong showing contributed to the cancellation of a planned successor to the PowerPC 604e due to its comparatively superior integer processing capabilities.

The PowerPC 740 maintained pin compatibility with its predecessor, the PowerPC 603, facilitating upgrades in systems such as the PowerBook 1400 and PowerBook 2400. In contrast, the PowerPC 750 required a new packaging format—a 360-pin ball grid array—to accommodate its external L2 cache interface.

Apple widely implemented the PowerPC 750 across numerous products including the original iMac.

RAD750

The RAD750 is a radiation-hardened variant based on the PowerPC 750 architecture, engineered specifically for environments with intense radiation exposure such as satellites and spacecraft. Introduced in 2001, it serves as the central processor for missions like the Mars Science Laboratory (Curiosity), Mars Reconnaissance Orbiter, Mars 2020 (Perseverance), and the James Webb Space Telescope.

Produced by BAE Systems utilizing either 250 nm or 150 nm manufacturing processes, the RAD750 contains approximately 10.4 million transistors on a die measuring about 130 mm2. It operates within a frequency range of 110 to 200 MHz and is designed to endure radiation levels between 200,000 and one million Rad as well as temperature extremes from −55 to +125 °C. The cost associated with its packaging and logic components exceeds US$200,000 due to the rigorous demands of radiation hardening, stringent quality assurance protocols, and comprehensive testing procedures.

PowerPC 745/755

In 1998, Motorola updated the 740/750 architecture by shrinking the die to 51 mm2 using a 0.22 μm aluminum fabrication process and boosting clock speeds up to 600 MHz. The PowerPC 755 found its way into select iBook and G3 iMac models. Subsequently, Motorola redirected its efforts from the 750 series toward developing the PowerPC 7400 (G4) and other processor cores.

PowerPC 750CX

IBM progressed the series with the introduction of the PowerPC 750CX (Sidewinder) in 2000. This model integrated a 256 KiB on-chip L2 cache, enhancing performance while lowering power consumption to below 4 W at 400 MHz. Manufactured with a 0.18 μm copper process, it housed 20 million transistors on a 43 mm2 die. The 750CX was utilized sparingly, appearing in a limited update of one iMac and iBook generation.

PowerPC 750CXe

Launched in 2001, the 750CXe (Anaconda) raised clock frequencies up to 700 MHz and upgraded the memory bus speed from 100 MHz to 133 MHz. It delivered superior floating-point capabilities compared to its predecessor, the 750CX. This processor was incorporated into multiple iBook versions as well as the final G3-based iMacs. Additionally, a cost-effective variant named the 750CXr operated at reduced clock rates.

Gekko

IBM’s Gekko CPU is a customized variant of the PowerPC 750CXe designed specifically for Nintendo’s GameCube console. It introduces approximately 50 new instructions along with a modified FPU that includes limited SIMD functionality. Operating at 486 MHz with a memory bus running at 162 MHz, it contains a 256 KiB on-die L2 cache and is fabricated using a 180 nm process technology on a die measuring 43 mm2.

PowerPC 750FX

The PowerPC 750FX (codenamed Sahara), released in 2002, increased operating frequency to 900 MHz and bus speed to 166 MHz while doubling the on-chip L2 cache to 512 KiB. Enhancements included an upgraded memory subsystem featuring a faster (200 MHz) 60x bus controller, an expanded L2 cache bus width, and support for cache locking. Produced with a 0.13 μm copper-based process incorporating Low-K dielectric and Silicon on insulator technologies, it contains approximately 39 million transistors within a compact die size of 35 mm2. Typical power consumption remains under 4 W at an operational frequency of 800 MHz. This processor marked Apple’s final use of G3-class CPUs in their last G3-based iBook models.

A low-power edition known as the 750FL was also made available.

Notably, the 750FX serves as the core processor for NASA’s Orion Multi-Purpose Crew Vehicle, integrated within Honeywell’s flight computer originally developed for Boeing’s 787 aircraft.

PowerPC 750GX

Unveiled in 2004, the PowerPC 750GX (code-named Gobi) boasts a substantial increase in cache size with a full megabyte of on-die L2 cache and supports clock speeds reaching up to 1.1 GHz alongside bus speeds up to 200 MHz. Fabricated using a refined 0.13 μm process that incorporates copper interconnects, low-K dielectric materials, and silicon on insulator technology, this chip contains around 44 million transistors across a die area of 52 mm2. Its power consumption is rated below 9 W when operating at typical loads near 1 GHz.

A power-efficient variant called the 750GL is also part of this lineup.

PowerPC 750VX

The anticipated but ultimately canceled PowerPC 750VX ("Mojave") was designed as the most sophisticated model in this family. It was planned to feature an off-die L3 cache up to 4 MB, a front-side bus running at DDR speeds of up to 400 MHz, and AltiVec vector processing support derived from the PowerPC 970. Targeted frequencies were as high as 1.8 GHz, leveraging advanced pipeline architectures and enhanced power management techniques. Although ready for production by late 2003, it was never commercially released due to shifting market demands as Apple transitioned toward G4 processors. Subsequent designs such as the proposed but unreleased 750VXe aimed to surpass the two-gigahertz threshold but did not come to market.

PowerPC 750CL

The 750CL represents an improved iteration of the 750CXe, delivering clock rates ranging from 400 MHz up to 1 GHz and supporting a system bus frequency as high as 240 MHz. This model incorporates L2 cache prefetching alongside instructions tailored for graphics processing, bearing a strong resemblance to the Gekko CPU and indicating it is essentially a scaled-down version of that design intended for broader applications. Fabricated using a 90 nm copper-based technology with Low-K dielectric and Silicon on Insulator (SOI) methods, the chip contains approximately 20 million transistors within a compact 16 mm2 die area. Its power usage spans from 2.7 watts at 600 MHz to nearly 9.8 watts when operating at 1 GHz.

Broadway

The processor powering the Wii, known as Broadway, closely mirrors the 750CL but operates at an unconventional speed of 729 MHz for this series. Its physical dimensions are notably small at just 4.2 by 4.5 mm (totaling 18.9 mm2), which is less than half the surface area of the GameCube's Gekko processor (43 mm2), demonstrating considerable miniaturization optimized for consumer devices.

Espresso

Espresso, the CPU utilized in the Wii U, is thought to be a development based on Broadway's architecture, featuring three cores running at approximately 1.24 GHz and produced with a 45 nm fabrication process. It introduces advancements such as multiprocessor capabilities and replaces conventional L2 cache with embedded DRAM (eDRAM) to enhance performance.

Future

IBM has transitioned away from publicly sharing roadmaps for the 750 series, instead focusing on delivering custom processor solutions. There are no announced intentions to manufacture standard 750-based chips below the 90 nm node, effectively withdrawing from the commodity market segment. Nevertheless, IBM remains active in creating specialized variants like Nintendo's Espresso processor, which incorporates sophisticated features and utilizes advanced manufacturing technologies.

Freescale Semiconductor has ceased production of all designs within the 750 family, shifting its focus toward PowerPC e500 cores found in PowerQUICC III products. Since 2015, legacy support for these processors has been provided by Rochester Electronics.

Device list

This compilation covers recognized designs based on the 750 architecture. Illustrations serve as representations and are not drawn to scale.

Espresso
Name Codename Manufacturer Image Fab Process Transistors Die size Cores CPU Clock Front Side Bus L2 cache Consumption Package Multipliers Introduced
PPC740
MPC740
Arthur IBM
Motorola
0.25 μm Aluminum 6.35 Million 67 mm2 1 233 - 366 MHz 66 MHz No L2 cache 5.6W @233 MHz

7.3W @300 MHz

255 pin CBGA 3-8 1997
PPC750
MPC750
Arthur IBM
Motorola
0.25 μm Aluminum 6.35 Million 67 mm2 1 233 - 366 MHz 66 MHz 256 -1024 kB
off-die
half speed
5.6W @233 MHz

7.3W @300 MHz

360 pin CBGA 3-8 1997
MPC745 Conan Motorola
Freescale
0.22 μm Aluminum 6.75 Million 51 mm2 1 300 -350 MHz 66 MHz No L2 cache 3.1W @300 MHz

5.4W @400 MHz

255 pin PBGA 2,3-8,10 1998
MPC755 Doyle Motorola
Freescale
0.22 μm Aluminum 6.75 Million 51 mm2 1 300 -400 MHz 66 MHz 256 -1024 kB
off-die
half speed
3.1W @300 MHz

5.4W @400 MHz

360 pin PBGA
360 pin CBGA
2,3-8,10 1998
PPC740L Lonestar IBM 0.20 μm Copper 6.35 Million 40 mm2 1 300 -533 MHz 100 MHz No L2 cache 4.1W @333 MHz

6.0W @500 MHz

255 pin CBGA 3-8

10 (dd3.x)

1999
PPC750L Lonestar IBM 0.20 μm Copper 6.35 Million 40 mm2 1 300 -533 MHz 100 MHz 256 -1024 kB off-die half speed 4.1 W @333 MHz

6.0 W @500 MHz

360 pin CBGA 3-8

10 (dd3.x)

1999
PPC750CX
PPC750CXe
PPC750CXr
PPCDBK
Sidewinder
Anaconda

Gekko
IBM [[File:PPC750CXe.jpg\]|100px]] 0.18 μm Copper 20 Million (including L2 cache) 42.7 mm² 1 350 -600 MHz
366 -700 MHz
300 -533 MHz
486 MHz
100 MHz
133 MHz
133 MHz
162 MHz
256 kB 4.2W @400 MHz
6 W @600 MHz
7.8 W @533 MHz
4.9W @486 MHz
256 pin PBGA 2000
2001
2003
2000
RAD750 BAE Systems [[File:RAD750.jpg\]|100px]] 0.25 μm -0.15 μm 10.4 Million 130 mm² 1 110 -200 MHz 66 MHz 0 -1024 kB off-die 5 W @133 MHz 360 pin CBGA Radiation hardened 2001
PPC750FX
PPC750FL
Sahara IBM [[File:PPC750FX.jpg\]|100px]] 0.13 μm SOI 38 Million (including L2 cache) 34.3 mm² 1 600 -900 MHz
600 -733 MHz
166 MHz 512 kB 5.4 W @800 MHz
5.1 W @733 MHz
292 pin CBGA 3.5-9.5

10-20

2002
2007
PPC750GX
PPC750GL
Gobi IBM [[File:PPC750GX.jpg\]|100px]] 0.13 μm SOI 74 Million (including L2 cache) 52.5 mm² 1 733 -1000 MHz
800 -933 MHz
200 MHz 1024 kB 8.3W @1 GHz
6.5W @933 MHz
292 pin CBGA 2-3.5

4-9.5

10-20

2003
2005
PPC750CL
Broadway
IBM [[File:PPC750CL.jpg\]|100px]] 90 nm /65 nm SOI 20 Million (including L2 cache) 15.9 mm² 1 400 -1000 MHz /729 MHz 240/243 MHz 256 kB 10.5 W max @1 GHz /3.9 W @729 MHz 278 pin PBGA 2006
IBM [[File:Nintendo-Wii-U-MCM.jpg\]|100px]] 45 nm SOI >60 Million (?) >27.7 mm² >3 >1243+ MHz > ? >512 kB /2048 kB /512 kB > ? >PBGA MCM 2012


See also

References

  • Gwennap, Linley (17 February 1997). "Arthur Revitalizes PowerPC Line". Microprocessor Report. pp. 10–13.