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PowerPC 970

From Alfawiki
PowerPC 970 series
Company typeMicroprocessor series
IndustrySemiconductor
PredecessorPowerPC (early 1990s design)
Founded2002
Headquarters
East Fishkill, New York
,
United States
ProductsPowerPC 970, 970FX, 970MP processors
ParentIBM and Apple (joint development)

The PowerPC 970 series, which includes the 970FX and 970MP models, consists of 64-bit PowerPC processors engineered by IBM and launched in 2002. Apple marketed the 970 under the name PowerPC G5 for its Power Mac G5 computers.

Originating from the PowerPC design established in the early 1990s through the AIM partnership, IBM and Apple jointly developed the 970 line, internally known as GP-UL (Giga Processor Ultra Light), based on IBM’s POWER4 architecture. Apple introduced the Power Mac G5 as the culmination of a five-year collaborative effort featuring a multi-stage development plan. Nevertheless, this strategy was shortened after Apple withdrew its commitment to produce a 3 GHz chip within a year of release. Furthermore, IBM faced challenges in cutting power consumption low enough for portable devices, restricting Apple to only three processor variants.

Outside of Apple's desktop offerings, IBM utilized the PowerPC 970 in JS20/JS21 blade servers, select entry-level workstations, and System p servers. The chip also serves in advanced embedded platforms such as Mercury Systems' Momentum XSA-200. IBM continues to license the PowerPC 970 core for tailored solutions, preserving its significance in niche sectors.

Design

The PowerPC 970 is a single-core processor derived from the POWER4, capable of executing both 32-bit and 64-bit PowerPC instructions natively. It incorporates a hardware prefetch mechanism along with a three-way branch predictor.

Mirroring the POWER4, its front-end pipeline spans nine stages. The 970 can fetch and decode up to eight instructions per cycle, dispatch five to reservation stations, issue eight to execution units, and retire five instructions each cycle. To enhance IPC, execution pipelines were extended compared to the POWER4. The processor contains eight execution units: two arithmetic logic units (ALUs), two double-precision floating-point units (FPUs), two load/store units, and two AltiVec units.

One AltiVec unit manages integer and floating-point operations, while the other is dedicated to permute instructions and is subdivided into three subunits handling simple integer, complex integer, and floating-point tasks respectively. Pipeline lengths differ by instruction type: 10 stages for simple integer and permute operations, 13 stages for complex integer instructions, and 16 stages for floating-point computations.

Communication with the system controller (northbridge) occurs over two separate unidirectional 32-bit double data rate (DDR) buses—one dedicated for reads and another for writes—each running at one-quarter of the CPU’s clock frequency. These channels transmit data, addresses, and control signals, capping peak bandwidth at 6.4 GB/s at 450 MHz; each direction supports up to 3.2 GB/s.

Generations

Every PowerPC 970 chip was fabricated at IBM’s East Fishkill facility in New York using white ceramic substrates typical of IBM’s premium processors during that timeframe.

PowerPC 970

IBM announced the PowerPC 970 in October 2002, with its first deployment occurring in Apple Computer's Power Mac G5 by June 2003. Apple labeled products powered by the PowerPC 970 as G5 to signify the fifth iteration of their PowerPC lineup. IBM released its inaugural PowerPC 970 blade servers—the BladeCenter JS20—in November 2003.

This processor model includes a full-speed 512 KB L2 cache and operates at clock frequencies between 1.6 and 2.0 GHz, paired with a front-side bus running at half the processor’s speed.

PowerPC 970FX

The PowerPC 970FX is fabricated using a 90 nm technology and exhibits a peak power consumption of 11 watts at 1 GHz, increasing up to 48 watts when operating at 2 GHz.

This processor comprises 10 execution units: two Fixed-Point Units, two Load/Store Units, two Floating Point Units, along with SIMD and branch units. It can handle up to 215 instructions simultaneously across multiple pipeline stages. The chip is equipped with a 64 KB Instruction Cache and a 32 KB Data Cache.

Apple incorporated the 970FX into multiple products throughout 2004, including the Xserve G5 (released in January), Power Mac G5 (June), and iMac G5 (August). The Power Mac G5 achieved maximum clock speeds of 2.5 GHz supported by liquid cooling solutions, later reaching 2.7 GHz by April 2005. In the iMac G5, the front side bus operated at one-third of the CPU's clock frequency.

Although there was significant demand for faster processors in laptops, Apple never launched a G5 CPU variant for the PowerBook line. The original PowerPC 970's power consumption was excessive for portable devices. While the 970FX reduced thermal design power to approximately 30 watts at 1.5 GHz, several constraints hindered its adoption in laptops: its performance was similar to existing G4 CPUs at comparable speeds, power-intensive northbridge chips were unsuitable for mobile platforms, and limited power-saving capabilities resulted in unsatisfactory battery endurance.

PowerPC 970MP

On July 7, 2005, IBM unveiled the PowerPC 970MP, codenamed "Antares", during the Power Everywhere forum held in Tokyo. This dual-core version of the 970FX operates within a frequency range of 1.2 to 2.5 GHz and consumes up to 75 W at 1.8 GHz and as much as 100 W at 2.0 GHz. Each core incorporates a 1 MB L2 cache, which is twice the size found in the 970FX, and is manufactured on the same 90 nm process. When not active, cores enter a low-power "doze" mode. Additionally, the 970MP supports partitioning and virtualization capabilities.

Apple deployed the PowerPC 970MP in its premium Power Mac G5 configurations, while the iMac G5 and PCI-X Power Mac G5 models continued utilizing the 970FX processor. IBM integrated the 970MP into its JS21 blade servers and Intellistation POWER 185 workstations, as well as in Fixstars Solutions' YDL PowerStation systems.

Due to its substantial power consumption, IBM ceased production of versions exceeding 2.0 GHz.

Northbridges

IBM produced two specialized northbridge chips tailored for systems based on the PowerPC 970 processors:

  • CPC925 – Developed by Apple and referred to as U3 or U3H (with ECC memory support). This northbridge accommodates up to two PowerPC 970 or 970FX CPUs, featuring dual unidirectional processor buses running at 550 MHz each, a DDR memory controller operating at 400 MHz, x8 AGP support, and a 400 MHz, 16-bit HyperTransport link. It is built on a 130 nm fabrication process. A lighter variant called U3Lite was planned for the PowerBook G5 but never released.
  • CPC945 – Designed by IBM and known as U4 within Apple nomenclature, it supports dual PowerPC 970MP processors with two unidirectional buses clocked at 625 MHz each. It includes dual memory controllers capable of handling up to 64 GB of ECC-protected DDR2 SDRAM running at 533 MHz, x16 PCIe lanes, and an 800 MHz, 16-bit HyperTransport interface. This chip is manufactured using a more advanced 90 nm process.

A CPC965 northbridge that was intended for launch in 2007 was ultimately canceled. This single-processor northbridge would have featured a DDR2 controller at 533 MHz supporting up to 8 GB of ECC memory, an eight-lane PCIe interface, integrated four-port Gigabit Ethernet with TCP/UDP offloading capabilities, USB 2.0 connectivity, and a Flash memory interface. It also incorporated an embedded PowerPC 405 core dedicated to system management and configuration tasks.

Buses

These modules incorporate IBM's exclusive Elastic Interface (EI) bus technology.

See also

Further reading

External links

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