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SuperSPARC

From Alfawiki
SuperSPARC
Company typeMicroprocessor
IndustrySemiconductor
Founded1992
FounderSun Microsystems
Headquarters
United States
ProductsMicroprocessors implementing SPARC V8 ISA

The SuperSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA), created by Sun Microsystems. The first models, operating at 33 and 40 MHz and released in 1992, incorporated 3.1 million transistors. Manufactured by Texas Instruments (TI) at their Miho, Japan facility, it utilized a 0.8 micrometer triple-metal BiCMOS fabrication process.

Following the initial release, two variants were developed: the SuperSPARC+ overcame design constraints that limited clock frequency, while the SuperSPARC-II, launched in 1994, delivered substantial performance enhancements, running at speeds up to 85 MHz for desktop machines and reaching 90 MHz in cooled SPARCserver-1000E configurations.

The SuperSPARC processors served as the core CPUs for both the SPARCstation 10 and SPARCstation 20. In 1995, the SuperSPARC-II was succeeded by the 64-bit UltraSPARC, which adopted the 64-bit SPARC V9 ISA.

SuperSPARC (Viking)

Model CPU L2 Cache Clock Speed Bus Speed Notes
SM20 single CPU none 33 MHz 33 MHz
SM21 single CPU 1 MB 33 MHz 33 MHz Exclusively used in early SPARCserver-2000 models
SM30 single CPU none 36 MHz 36 MHz
SM40 single CPU none 40 MHz 40 MHz
SM41 single CPU 1 MB 40.3 MHz 40 MHz
SM50 single CPU none 50 MHz 50 MHz
SM51 single CPU 1 MB 50 MHz 40 MHz
SM51-2 single CPU 2 MB 50 MHz 40 MHz
SM52 dual CPU 1 MB 45 MHz 40 MHz
SM52X dual CPU 1 MB 50 MHz 40 MHz
SM61 single CPU 1 MB 60 MHz 50/55 MHz
SM61-2 single CPU 2 MB 60 MHz 50/55 MHz

SuperSPARC II (Voyager)

Model CPU L2 Cache Clock Speed Bus Speed Notes
SM71 single CPU 1 MB 75 MHz 50 MHz
SM81 single CPU 1 MB 85 MHz 50 MHz
SM81-2 single CPU 2 MB 85 MHz 50/55 MHz
SM91-2 single CPU 2 MB 90 MHz 50 MHz

See also