UltraSPARC
| Company type | Microprocessor |
|---|---|
| Industry | Semiconductor |
| Founded | 1995 |
| Founder | Sun Microsystems |
| Parent | Sun Microsystems |
The UltraSPARC is a microprocessor created by Sun Microsystems and manufactured by Texas Instruments, launched in the middle of 1995. It represents Sun's initial processor to support the 64-bit SPARC V9 instruction set architecture (ISA). Among its microarchitects was Marc Tremblay.
Microarchitecture
This processor is a four-issue superscalar design that processes instructions in order, incorporating a nine-stage pipeline for integer operations.
Functional units
To enable increased clock rates, the execution units were streamlined relative to the SuperSPARC; for instance, the ALUs were designed without cascading to prevent limitations on frequency.
The integer register file consists of 32 entries of 64 bits each, organized into eight register windows totaling 144 registers, with seven read and three write ports. It supplies data to two arithmetic logic units (ALUs) as well as the load/store unit. Both ALUs support arithmetic, logical, and shift functions; however, only one executes multiplication and division operations.
The floating-point unit contains five distinct functional units: individual units for addition/subtraction, multiplication, division/square-root, plus two dedicated to SIMD instructions through the Visual Instruction Set (VIS). Its register file includes thirty-two 64-bit registers equipped with five read ports and three write ports.
Cache
The UltraSPARC incorporates a two-level cache hierarchy: separate 16 KB primary caches for instructions and data, complemented by a compulsory external unified secondary cache ranging from 512 KB up to 4 MB. This secondary cache is direct-mapped and utilizes synchronous SRAM operating at the processor’s clock speed, enabling single-cycle data retrieval via the data bus.
Fabrication
Containing 3.8 million transistors, it was produced using Texas Instruments' EPIC-3 process—a 0.5 μm complementary metal–oxide–semiconductor (CMOS) technology featuring four metal layers. TI opted against BiCMOS for this scale due to its unsuitability and marginal performance improvements. This CMOS fabrication was initially optimized on TI's MVP digital signal processor (DSP) before being employed for UltraSPARC manufacturing to circumvent challenges encountered with SuperSPARC.
Package
The UltraSPARC is encapsulated within a plastic ball grid array (PBGA) package that includes 521 contacts.