Tandem Computers

Tandem Computers, Inc.
Company type	Public (until 1997 acquisition)
Industry	Computer hardware, Fault-tolerant computing systems
Founded	1 January 1974; 52 years ago in Cupertino, California, United States
Founder	James Treybig
Defunct	1997
Fate	Acquired by Compaq
Successor	Compaq (later Hewlett Packard Enterprise)
Headquarters	Cupertino, United States
Area served	Worldwide
Key people	James Treybig (founder)
Products	Tandem NonStop fault-tolerant computer systems
Number of employees	8,000 (1996)

Tandem Computers, Inc. was a prominent producer of fault-tolerant computing systems designed for mission-critical transaction processing across sectors like banking, stock markets, telecommunications, and emergency response. Established in 1974 by James Treybig in Cupertino, California, Tandem operated independently until its 1997 acquisition by Compaq. Subsequently, it became part of Hewlett Packard Enterprise following HP's purchase of Compaq.

The company's signature NonStop systems were distinguished by a shared-nothing architecture comprising multiple autonomous processors and redundant hardware components that enabled seamless failover without data compromise. This architecture facilitated linear scalability—doubling the number of processors effectively doubled system throughput up to 4,000 units—surpassing traditional multiprocessor designs hindered by shared memory constraints. Tandem aimed its solutions at extensive commercial environments demanding both high fault tolerance and exceptional performance, positioning itself as a competitor to IBM mainframes while utilizing comparatively simpler minicomputer-based technology.

Founding

Entrepreneur James Treybig founded Tandem Computers in 1974 after recognizing an unmet need for highly dependable OLTP systems during his time at Hewlett-Packard’s HP 3000 division. When HP declined to back his vision, Treybig crafted Tandem’s business plan with support from venture capital firm Kleiner Perkins and enlisted key engineers from HP, including Mike Green and Jim Katzman. Their objective was to develop modular, ultra-reliable systems devoid of single points of failure while maintaining competitive pricing and throughput relative to existing fault-tolerant offerings.

The design of the original Tandem/16 hardware was finalized in 1975, with the first deployment occurring at Citibank in 1976. Financial backing came from Tom Perkins, former HP 3000 general manager and venture capitalist. The company cultivated a unique corporate culture reflecting Treybig’s leadership principles. Tandem experienced rapid growth through the early 1980s; by 1996, it reported revenues of $2.3 billion and employed approximately 8,000 personnel worldwide.

Tandem NonStop (TNS) stack machines

Spanning over four decades, Tandem’s NonStop product family evolved from the initial T/16 fault-tolerant platform through three significant architectural and instruction set revisions. Each generation included multiple iterations aligned with advancements in semiconductor technology.

Unlike traditional mainframes whose mean-time-between-failures (MTBF) measured in days, NonStop systems targeted MTBF values that were two orders of magnitude longer, achieving operational uptimes measured in years. Despite this exceptional reliability, NonStop platforms remained cost-effective; a dual-CPU configuration was priced at just over twice that of a comparable single-processor mainframe, whereas alternative fault-tolerant systems typically cost four times or more.

NonStop I

The inaugural system—known as the Tandem/16 or T/16, later renamed NonStop I—featured between two and sixteen CPUs arranged as a fault-tolerant cluster within a single cabinet. Each CPU contained dedicated memory, an I/O processor, and bus interfaces, along with dual connections to other CPUs via the proprietary Dynabus. Disk and network controllers were duplicated with dual CPU links; disks employed mirroring to ensure data integrity. Power supplies were configured to maintain operation despite individual component failures. This intricate setup was documented using "Mackie diagrams," named after lead salesperson David Mackie. Importantly, all redundant components contributed actively to processing capacity rather than serving solely as hot spares.

Engineered for swift fault detection ("fail fast"), the T/16 utilized custom circuitry for error checking without duplicating major subsystems. The proprietary 16-bit stack-based CPU architecture drew influence from the HP 3000 minicomputer and incorporated paged virtual memory alongside early adoption of 32-bit addressing—capabilities essential for supporting complex software and large-scale applications. The T/16 compiler efficiently handled register spilling, delivering performance improvements over the HP 3000’s microcode-based approach.

Each CPU operated at approximately 0.7 MIPS with four virtual memory segments capped at 128 KB each. Initially, programming was supported exclusively via Transaction Application Language (TAL), a machine-specific systems language derived from HP 3000’s SPL. Subsequent releases expanded language support to include Cobol74, Basic, Fortran, Java, C, C++, and MUMPS.

The NonStop series ran on a proprietary operating system initially named T/TOS and later called Guardian, designed to safeguard data against both hardware and software faults. Guardian employed message passing exclusively for interprocess communication without shared memory usage, facilitating scalability across clustered CPUs and enabling early isolation of corrupted data.

All file system and transaction processes operated as master/slave pairs on distinct CPUs; slave processes checkpointed the states of their masters and assumed control upon failure detection. This design ensured uninterrupted operation without data loss while imposing lower performance overhead compared to full duplication strategies used elsewhere. While some applications implemented checkpointing directly, most relied on Tandem’s software layers that abstracted these mechanisms from developers.

NonStop II

The NonStop II, launched in 1981, succeeded all T/16 CPUs by introducing optional 32-bit addressing through a user-selectable "extended data segment." This enhancement allowed software to evolve for an additional decade, maintaining an advantage over both the T/16 and HP 3000 systems. Despite this, the visible registers stayed 16-bit, which led to less efficient instructions compared to standard 32-bit minicomputers. Because the NonStop II lacked broader internal data pathways, it required additional microcode operations to handle 32-bit addresses. Its CPU architecture comprised three boards containing chips similar to those in the T/16, and it replaced core memory with battery-backed DRAM.

NonStop TXP

Debuting in 1983, the NonStop TXP represented the first fresh implementation of the TNS instruction set architecture. Constructed from off-the-shelf TTL and Programmed Array Logic components across four boards per CPU, it introduced Tandem’s inaugural cache memory and improved direct 32-bit addressing—although still processed through 16-bit adders. A larger microcode store reduced instruction cycles, resulting in enhanced performance of up to 2.0 MIPS. The system preserved compatibility with earlier models by utilizing the same rack design, controllers, backplane, and buses; originally, the Dynabus and I/O buses were designed with ample capacity to accommodate multiple future generations.

FOX

Up to fourteen TXP and NonStop II units could be interconnected via FOX, a fault-tolerant fibre optic bus designed for long-distance communication between TNS clusters across corporate campuses. This setup supported clusters consisting of as many as 224 CPUs, enabling robust mainframe-scale applications. The Guardian operating system facilitated seamless failover of entire task sets among machines within the network. Furthermore, conventional long-haul network connections allowed for global clusters scaling up to 4,000 CPUs.

NonStop VLX

In 1986, Tandem introduced its third-generation CPU known as the NonStop VLX. This model featured full 32-bit data paths, expanded microcode width, a clock cycle time of 12 MHz, and peak performance of one instruction per cycle. It was built on three boards populated with ECL gate array chips using TTL pinouts and incorporated an updated Dynabus capable of transfer rates up to 20 MB/s per link (40 MB/s aggregate). Subsequent improvements such as FOX II extended the TNS cluster’s reach to distances of up to four kilometers.

Initially, Tandem supported hierarchical non-relational databases through the ENSCRIBE file system before evolving support toward relational databases with ENCOMPASS. In 1986, Tandem unveiled NonStop SQL, the first fault-tolerant SQL database developed entirely in-house. It guaranteed data integrity across nodes and exhibited unique linear scalability as nodes were added—unlike most databases that plateaued after two CPUs. The 1989 iteration introduced distributed transactions, a groundbreaking advancement at that time. Over time, NonStop SQL progressed into NonStop SQL/MP and NonStop SQL/MX through Tandem’s mergers with Compaq and HP. Its underlying code continues to be utilized in HP’s current offerings as well as in the Apache Trafodion project.

NonStop CLX

The NonStop CLX, released in 1987, targeted the lower-cost segment of the fault-tolerant market as well as remote endpoints within Tandem’s network infrastructure. Initially delivering performance comparable to the TXP and later approximately 20% slower than the VLX, its compact form factor made it suitable for office environments such as copier rooms. The CLX CPU was implemented on a single board containing six "compiled silicon" ASIC CMOS chips; its principal chip was duplicated and operated in lock-step mode to detect errors and ensure data accuracy. Although this duplication did not inherently provide fault tolerance, it guaranteed consistent CPU outputs. Constraints included pinout limitations and shared external microcode, cache, and TLB resources over a single bus and SRAM bank—necessitating at least two machine cycles per instruction execution.

NonStop Cyclone

In 1989, Tandem introduced the NonStop Cyclone, a high-performance yet expensive system aimed at the mainframe sector. Each fault-tolerant CPU incorporated three circuit boards filled with heat-intensive ECL gate array chips alongside memory modules. Although microprogrammed, the CPU operated as a superscalar processor, frequently executing two instructions per cache cycle by utilizing distinct microcode sequences tailored for frequent instruction pairs. Cyclone CPUs were organized into four-processor units interconnected through a fiber optic adaptation of Dynabus.

The Cyclone's enclosures were designed with sharp black angles to symbolize robustness, and marketing campaigns likened its processing speed to that of the Lockheed SR-71 Blackbird reconnaissance aircraft. Its name was chosen to represent its "unstoppable velocity in OLTP environments." The system's announcement on October 17, 1989, coincided with the powerful 6.9 magnitude Loma Prieta earthquake, which disrupted the local area but resulted in no serious injuries at Tandem facilities.

Rainbow

From 1980 to 1983, Tandem pursued a comprehensive overhaul of both hardware and software architectures to enhance the NonStop platform beyond its inherited HP 3000 features. Rainbow introduced a 32-bit register-file design intended to outperform Digital Equipment Corporation’s VAX. The primary programming language was "TPL," a subset derived from Ada, although Ada compilers at that time were still immature. Due to the absence of a migration route from TAL-based NonStop applications, customers faced the challenge of adopting an entirely new software ecosystem. Despite redesigning the operating system, database, and Cobol compilers, delays in software delivery and hardware becoming outdated led to the project's discontinuation in favor of maintaining upward compatibility and facilitating smoother transitions.

Rainbow’s sophisticated client/server architecture named "Crystal" continued development independently and was eventually commercialized as the "Ellipse" product by Cooperative Systems Incorporated.

Dynamite PC

Tandem entered the personal computing arena in 1985 with the MS-DOS-compatible Dynamite PC/workstation. However, its proprietary 8086-based hardware lacked compatibility with standard IBM PC expansion cards, effectively limiting its role to that of an intelligent terminal. This product was soon discontinued.

In 1986, Tandem released the 6AT, an IBM PC AT-compatible model marketed exclusively to existing clients, reflecting a conservative approach: "we are not going to go out and innovate."

Integrity

While Tandem’s NonStop operating system delivered scalability, exceptional reliability, and efficient utilization of backup resources, many users favored simpler Unix-based platforms offering industry-standard software options. Competitors such as Stratus Technologies adopted fault-tolerant designs centered on hardware redundancy using hot spares—a concept IBM later rebranded as "IBM System/88."

These architectures rely on multiple physical processors per logical unit for fault detection and automatic failover, increasing hardware expenses but taking advantage of commodity microprocessors.

Introduced in 1989, Tandem’s Integrity series featured MIPS processors running a Unix variant called NonStop UX developed in Austin, Texas. The 1991 Integrity S2 implemented Triple Modular Redundancy (TMR), employing three MIPS R2000 CPUs per logical processor with voting logic to isolate faults. Subsequent models utilized "pair and spares" redundancy by running processor pairs synchronously alongside hot-spare pairs that could assume control upon failure. The 1995 Integrity S4000 launched ServerNet, a networked bus architecture enabling peripheral sharing across the NonStop family.

This lineup underscored Tandem’s commitment to fault-tolerant solutions tailored for mission-critical workloads, solidifying its leadership within the high-availability computing sector.

Wolfpack

From 1995 to 1997, Tandem collaborated with Microsoft to create high-availability capabilities and sophisticated SQL configurations for clusters composed of standard Windows NT hardware. This joint effort, known as "Wolfpack," culminated in the 1997 release of Microsoft Cluster Server. Although Microsoft secured a substantial market lead, Tandem did not experience equivalent commercial success from this partnership.

TNS/R NonStop transition to MIPS

Initially, Tandem developed its own CPUs featuring unique instruction sets and custom compilers. However, escalating expenses in chip design and manufacturing prompted Tandem to align with MIPS Technologies, adopting their R3000 and subsequent processors along with the corresponding optimizing compiler. NonStop Guardian systems built on MIPS architecture were branded as TNS/R models.

Cyclone/R

In 1991, Tandem unveiled the Cyclone/R (CLX/R), an affordable mid-tier system that utilized R3000 microprocessors instead of slower proprietary hardware. At first, the NonStop Kernel (NSK) operating system and NonStop SQL database were compiled into stack machine code, which was then converted at installation into optimized MIPS instructions using the Accelerator utility. Less critical applications were executed through a TNS code interpreter. This phased migration approach ensured a seamless software transition with solid performance and minimal impact on developers. Subsequent upgrades introduced a faster NSK OS running in native mode.

To maintain data consistency, Cyclone/R employed pairs of R3000 CPUs operating in lock-step—processing identical data streams with the checker processor lagging one cycle behind the primary. This technique allowed shared cache usage without compromising system speed. Achieving dependable lock stepping required resolving intricate microprocessor determinism issues through close cooperation between Tandem and MIPS, underscoring the challenges of integrating third-party processors into fault-tolerant systems.

NonStop Himalaya K-series

In 1993, Tandem released the NonStop Himalaya K-series equipped with the more powerful MIPS R4400 CPU, a native NSK operating system, and fully scalable Cyclone components. These systems continued to use Dynabus, Dynabus+, and the original I/O bus technologies, which were approaching their performance ceilings.

Open System Services

By 1995, the NonStop Kernel incorporated a Unix-like POSIX interface named Open System Services while preserving the original Guardian shell and application binary interface.

NonStop Himalaya S-Series

Tandem introduced the NonStop Himalaya S-Series in 1997 featuring a new architecture based on ServerNet interconnects. ServerNet replaced previous buses such as Dynabus, FOX, and I/O buses, delivering faster and more adaptable connectivity beyond simple dual redundancy. Tandem actively promoted ServerNet beyond internal deployment; it eventually became the foundation for the InfiniBand industry standard.

S-Series models utilized various MIPS processors including R4400, R10000, R12000, and R14000. The development of these MIPS cores was largely financed by Silicon Graphics Inc. However, Intel’s sixth-generation Pentium Pro outperformed these RISC chips, coinciding with a downturn in SGI’s graphics business. With no further investment planned for advanced MIPS cores suitable for high-end servers, Tandem faced the necessity of transitioning NonStop to a more competitive microprocessor platform.

Compaq Acquisition and the Alpha Processor Transition Attempt

Jimmy Treybig, the company's founder and CEO, remained at the helm until the market downturn in 1996. That year, Roel Pieper took over as president and CEO. During Pieper’s leadership, Tandem underwent a rebranding effort to establish itself firmly as a Wintel (Windows/Intel) platform—a strategic move crafted by Ronald May’s internal branding team—which subsequently attracted acquisition interest.

In 1997, Compaq purchased Tandem to broaden its portfolio beyond personal computers and to capitalize on Tandem’s ServerNet/InfiniBand innovations. The following year, Compaq acquired Digital Equipment Corporation, bringing in its DEC Alpha RISC server technology and customer base. Initially, Tandem was migrating NonStop systems from MIPS R12000 processors to Intel's forthcoming Itanium Merced chips but pivoted mid-development to adopt Alpha processors to better integrate with Compaq’s server offerings. Nevertheless, by 2001 Compaq discontinued Alpha development in favor of Itanium before any Alpha-based NonStop products were released.

Hewlett-Packard Takeover and TNS/E Shift to Itanium

In 2001, Hewlett-Packard began transitioning away from its established PA-RISC processor lines toward Intel's Itanium microprocessors, which HP had a hand in designing. Shortly thereafter, HP and Compaq announced their merger, finalized in May 2002, leading to the consolidation of overlapping product lines. Although this merger challenged the engineering cultures inherited from DEC and the traditional "HP Way," it ultimately enhanced the combined entity’s capability to profitably market complex enterprise solutions, benefiting both the enduring NonStop division and its clientele.

Tandem’s journey—from an HP-inspired startup to an HP business unit—signified a return to its origins within a substantially altered corporate framework.

The NSK-based NonStop product family was ported from MIPS architecture to Itanium processors and rebranded as "HP Integrity NonStop Servers," distinct from Tandem’s earlier "Integrity" Unix line. Because Itanium McKinley processors lacked support for clock-level lock stepping, Integrity NonStop systems implemented lock stepping by comparing chip states at interrupt events and software synchronization points. Synchronization occurred at intervals determined by every n'th taken branch and was inserted into extended loops by NonStop compilers. This architecture supported dual and triple modular redundancy—with two or three microprocessors assigned per logical Itanium processor—the triple redundancy option catering to customers requiring maximum fault tolerance. This design approach was termed NSAA, NonStop Advanced Architecture.

Customers experienced a smooth software transition; native source code originally compiled for MIPS was recompiled for Itanium processors, while legacy non-native TNS stack machine software was ported using object code translation techniques.

Transition from Itanium to Intel x86 Architecture

The migration away from Itanium processors toward Intel x86 architecture concluded in 2014 with the introduction of commercial systems featuring fault-tolerant 4X FDR (Fourteen Data Rate) InfiniBand double-wide switches. This enhancement boosted system interconnect bandwidth by more than twenty-five times, significantly improving performance and scalability for enterprise users.

Future Directions and Additional Developments

The NSK Guardian operating system served as the foundation for HP Neoview OS, which was tailored for Business Intelligence and Enterprise Data Warehouse workloads. NonStop SQL/MX was adapted into Neoview SQL with optimizations for BI applications. This codebase was also ported to Linux platforms, forming the basis of the Apache Trafodion project.

Corporate culture

James Treybig, the company's founder, crafted a business approach that deeply reflected his personal principles, fostering a corporate environment with unique benefits such as paid sabbaticals lasting six weeks every four years. Employees also received an annual allocation of 100 Tandem shares. To encourage camaraderie and open communication, the company organized weekly social gatherings known as Beer Bust Fridays and hosted monthly worldwide broadcasts titled "First Friday" to sustain employee involvement and dialogue.

User groups

ITUG (International Tandem User Group), currently integrated into Connect
OzTUG (Australia and New Zealand Tandem Users Group): [1]
BITUG (British Isles NonStop User Group): [2]
GTUG (German Tandem Users Group): [3]

External links