POWER8

POWER8
Company type	Microprocessor series
Industry	Semiconductor
Founded	August 2013; 13 years ago
Founder	IBM
Headquarters	Armonk, United States
Products	Superscalar multi-core microprocessors
Parent	IBM

POWER8 represents a series of superscalar multi-core microprocessors built upon the Power ISA, introduced in August 2013 during the Hot Chips conference. Offered for licensing through the OpenPOWER Foundation, this marked IBM's initial release of its premier processors beyond its own organization.

IBM released POWER8-based systems in June 2014, followed by additional hardware from OpenPOWER partners in early 2015.

Design

Designed for extensive multithreading capabilities, POWER8 supports eight hardware threads per core, resulting in a total of 96 threads on a 12-core processor. It incorporates large on-chip and off-chip eDRAM caches alongside integrated memory controllers that provide elevated memory and I/O throughput. Its performance generally doubles or triples compared to the previous POWER7 model.

The processor is available in configurations featuring either 6 or 12 cores, manufactured using a 22 nm silicon on insulator (SOI) technology with 15 metal layers. The 12-core variant comprises 4.2 billion transistors within a die size of 650 mm², whereas the 6-core version occupies 362 mm². Both models offer flexible core enablement, allowing operation with 4, 6, 8, 10, or all 12 cores active.

CAPI

Replacing the earlier GX++ bus, POWER8 employs the CAPI (Coherent Accelerator Processor Interface) port layered over PCI Express 3.0 to link specialized processors such as GPUs, ASICs, and FPGAs. Devices connected via CAPI share the CPU’s memory address space, thereby shortening data processing paths. At the 2013 ACM/IEEE Supercomputing Conference, IBM and Nvidia revealed their collaboration to integrate POWER8 with Nvidia GPUs for high-performance computing systems, initially showcased with the Power Systems S824L.

On October 14, 2016, IBM introduced OpenCAPI to encourage broader adoption of CAPI technology across different platforms. Founding members included Google, AMD, Xilinx, Micron, and Mellanox.

OCC

POWER8 includes an on-chip controller (OCC), a microcontroller dedicated to power and thermal management based on a PowerPC 405 core. It features two general-purpose offload engines and contains 512 KB of embedded SRAM with direct access to main memory while running open-source firmware. The OCC regulates operating frequency, voltage levels, memory bandwidth, and thermal parameters for both the CPU and its memory through 1,764 integrated voltage regulators. It enables dynamic adjustment of clock speeds for either overclocking or power reduction, functioning similarly to configurable TDP options found in Intel and AMD processors.

Memory Buffer chip

To improve memory controller efficiency, POWER8 offloads scheduling, energy management, and reliability functions to a dedicated Memory Buffer chip called Centaur. This division enhances memory access performance by conserving bandwidth and accelerating communication between processor and memory. Each Centaur chip adds 16 MB of L4 cache (up to a maximum of 128 MB per CPU). Depending on the system design, these chips are located either on memory modules (Custom DIMM/CDIMM in S824 and E880 models) or mounted on riser cards paired with standard DIMMs (S822LC systems).

Each buffer chip connects through a high-speed multi-lane serial interface supporting memory channels capable of writing two bytes while simultaneously reading one byte. Entry-level configurations operate at speeds of 8 GB/s; higher-end and HPC variants achieve up to 9.6 GB/s with latency around 40 ns, allowing sustained bandwidths of 24 GB/s and 28.8 GB/s per channel respectively. With two memory controllers per processor and four channels each, total bandwidth can reach as high as 230.4 GB/s. System reliability is improved via real-time lane isolation and repair mechanisms.

The Memory Buffer chips interface with either DDR3 or DDR4 memory running at 1600 MHz without altering processor-side links. This design delivers up to 32 memory channels per processor and peak transfer rates reaching 409.6 GB/s between Centaur chips and DRAM modules. Initial supported DIMM capacities were 16 GB, 32 GB, and 64 GB (allowing up to 1 TB per CPU), later expanded to include larger modules of 128 GB and 256 GB enabling maximum capacities up to 4 TB per processor.

Specifications

The POWER8 core is equipped with a 64 KB L1 data cache alongside a 32 KB L1 instruction cache, supported by an integrated 512 KB L2 cache. Each core is capable of fetching, decoding, dispatching, issuing, executing, and committing up to eight instructions in every cycle.

Within each POWER8 core, six main execution units are present:

Instruction fetch unit (IFU)
Instruction sequencing unit (ISU)
Load–store unit
Fixed-point unit (FXU)
Vector and scalar unit (VSU)
Decimal floating-point unit (DFU)

Each core accommodates sixteen execution pipelines as follows:

Two pipelines dedicated to fixed-point operations
Two pipelines for load-store operations
Two pipelines exclusively for load operations
Four double-precision floating-point pipelines, which also support eight single-precision pipelines
Two symmetric vector pipelines featuring VMX and VSX AltiVec capabilities
One cryptographic pipeline handling AES, Galois Counter Mode, and SHA-2 algorithms
One branch execution pipeline
One condition register logical pipeline
One decimal floating-point pipeline

Improvements include an expanded issue queue with 4×16 entries, enhanced branch prediction mechanisms, and a doubled capacity for managing cache misses. Each core supports eight-way simultaneous multithreading that can be dynamically configured to operate with one, two, four, or eight active threads. POWER8 also introduces hardware transactional memory support. IBM projects that each core achieves approximately 1.6 times the single-threaded performance compared to POWER7.

The POWER8 processor architecture is based on a design featuring either six or twelve chiplets, with models activating between four and twelve chiplets. Each chiplet integrates one processing core, a 512 KB SRAM L2 cache connected via a 64-byte wide bus—twice as wide as its predecessor—and an 8 MB shared L3 eDRAM cache per chiplet. As a result, processors with six chiplets provide 48 MB of L3 eDRAM cache, while twelve-chiplet variants offer up to 96 MB. Moreover, up to 128 MB of off-chip L4 eDRAM cache can be incorporated through Centaur companion chips. On-chip memory controllers facilitate support for up to 1 TB of RAM with sustained bandwidth reaching 230 GB/s. PCI Express controllers deliver an I/O bandwidth of 48 GB/s. Core frequencies vary from 2.5 GHz to 5 GHz.

Six-core processors are combined into dual-chip modules (DCM) utilized in IBM’s scale-out server systems; configurations differ with some cores potentially disabled. The twelve-core version is implemented in high-performance models such as the E880 and E880C.

IBM markets its single-chip POWER8 module under the name Turismo, whereas the dual-chip configuration is known as Murano. PowerCore’s tailored adaptation carries the designation CP1.

POWER8 with NVLink

This enhanced iteration of the original twelve-core POWER8—previously referred to as POWER8+—integrates support for Nvidia’s NVLink interconnect technology, allowing direct linkage of up to four NVLink-enabled devices. IBM replaced the earlier A Bus and PCI interfaces used for symmetric multiprocessing (SMP) connections with NVLink technology; meanwhile, CPU socket connections have transitioned to using the X Bus. Aside from a modest increase in die size to 659 mm², alterations compared to earlier POWER8 processors remain minimal.

Licensees

On January 19, 2014, Suzhou PowerCore Technology Company became a member of the OpenPOWER Foundation and obtained a license for the POWER8 core to develop custom processors aimed at big data and cloud computing sectors.

Variants

IBM Murano: a processor with 12 cores formed by combining two six-core chips, intended for scale-out deployments, featuring options to disable certain cores.
IBM Turismo: a single-chip 12-core processor tailored for scale-up environments, commercially offered with configurable disabled cores.
PowerCore CP1: a POWER8 variant incorporating enhanced security measures in response to US-China export regulations, produced at GlobalFoundries' East Fishkill facility in New York; launched in 2015.

Systems

IBM

Scale Out servers accommodate one or two sockets, each containing dual-chip modules with two six-core POWER8 processors. These are available in 2U or 4U rackmount and tower formats. The "L" models operate exclusively on Linux, whereas other variants support AIX, IBM i, and Linux. Versions labeled "LC" are manufactured by OpenPOWER collaborators.

Power Systems S812L – single POWER8 DCM (4, 6, or 8 cores), 2U form factor
Power Systems S814 – single POWER8 DCM (6 or 8 cores), available as 4U rack or tower
Power Systems S822 and S822L – one or two POWER8 DCMs (6, 10, 12, or 20 cores), housed in 2U
Power Systems S824 and S824L – one or two POWER8 DCMs (6, 8, 12, 16, or 24 cores), in a 4U chassis
Power Systems S821LC "Stratton" – dual POWER8 SCM (8 or 10 cores), 1U size, supports up to 512 GB DDR4 memory with Centaur L4 cache chips; produced by Supermicro.
Power Systems S822LC for Big Data "Briggs" – dual POWER8 SCM (8 or 10 cores), 2U enclosure, up to 512 GB DDR4 RAM; manufactured by Supermicro.

Enterprise servers feature nodes with four sockets each populated by modules containing processors of 8, 10, or 12 cores. These systems can scale up to a maximum of 16 sockets, totaling 128 cores and supporting as much as 16 TB of RAM. Supported operating systems include AIX, IBM i, and Linux.

Power Systems E850 – configurations from two to four POWER8 DCMs (8, 10, or 12 cores), housed in a 4U chassis
Power Systems E870 – supports up to two nodes of five units each with four sockets per node (up to 80 cores)
Power Systems E880 – accommodates up to four nodes of five units each with four sockets per node (up to192 cores)

High-performance computing platforms:

Power Systems S812LC – single POWER8 SCM (8 or10 cores), in a2U chassis; built by Tyan.
Power Systems S822LC "Firestone" – dual POWER8 SCM (8 or10 cores), housed in2U; equipped with two Nvidia Tesla K80 GPUs and supports up to1 TB DDR3 RAM; produced by Wistron.
Power Systems S822LC for HPC "Minsky" – dual POWER8+ SCM (8 or10 cores), contained in2U; capable of supporting up to four Nvidia Tesla P100 GPUs connected via NVLink and up to1 TB DDR4 RAM; manufactured by Wistron.

Hardware Management Console:

7063-CR1 HMC – single POWER8 SCM (6 cores), sized at1U; based on SuperMicro's Stratton design.

Tyan

ATX form-factor motherboard featuring a single-chip POWER8 socket (SP010GM2NR).
Palmetto GN70-BP010 – OpenPOWER reference design server, a2U unit with one four-core POWER8 SCM.
Habanero TN-71-BP012 –2U server equipped with one eight-core POWER8 SCM and thirty-two RAM slots.
GT75-BP012 –1U server housing either an eight- or ten-core POWER8 SCM alongside thirty-two RAM slots.

Google

Created an internal-use dual-socket motherboard.

StackVelocity

Developed the high-performance reference system known as "Saba."

Inspur

Collaborated with IBM to produce server hardware based on POWER8 processors.

Provides a4U server model featuring two POWER8 sockets.

Cirrascale

RM4950 –4U server incorporating a four-core POWER8 SCM alongside four Nvidia Tesla K40 accelerators; utilizes Tyan's motherboard design.

Zoom Netcom

Offers the RedPOWER C210 and C220, which are2U and4U servers respectively with two POWER8 sockets and sixty-four RAM slots. Also provides the RedPOWER C310 and C320, both equipped with two CP1 sockets.

ChuangHe

Manufactures the OP-1X, a compact1U single-socket server featuring thirty-two RAM slots.

Rackspace

Developed the Barreleye, a1U dual-socket server supporting thirty-two RAM slots, built on the Open Compute Project platform for their OnMetal service.

Raptor Computing Systems / Raptor Engineering

Plans for the unreleased Talos I, intended as a4U single-socket server/workstation with eight RAM slots.

Penguin Computing

Markets the Magna line:

Magna 2001, designed for software development tasks
Magna 1015, focused on virtualization workloads
Magna 2002 and Magna 2002S, optimized for machine learning purposes

External links

IBM Power Systems: POWER8 Overview (PDF)