VAX 8000
| Industry | Computer hardware |
|---|---|
| Founded | May 16, 1957 in Maynard, Massachusetts, United States |
| Products | VAX 8000 series superminicomputers |
| Website | www |
The VAX 8000 series represents a now-obsolete line of superminicomputer systems engineered by Digital Equipment Corporation (DEC), utilizing processors based on the VAX instruction set architecture (ISA).
Launched in October 1984 with the introduction of the 8600 model, this series was positioned at the upper tier of the VAX product range, delivering performance approximately quadruple that of the earlier 11/780. The 8650 model followed in December 1985, succeeded shortly after by the mid-level 8200 and 8300 series in January 1986. In 1987, the 8800 took over as the flagship, complemented by lower-performance variants such as the 8700 and 8500. DEC also provided multiple clustering configurations for these systems. Operating environments included both VMS and Ultrix.
Initially, the plan was for the 8800 to be succeeded by the VAX 9000, but due to that project's cancellation, enhancements were made to the mid-range VAX 6000 to achieve comparable performance to the 8800 at roughly half the expense. Ultimately, all these models were phased out in July 1992 in favor of the VAX 7000/10000, which featured single-chip processors derived from the NVAX CPU—the last dedicated VAX hardware.
VAX 8600
Introduced in October 1984 and internally dubbed "Venus", the VAX 8600 was originally referred to as "VAX-11/790" before receiving its final designation. It replaced the VAX-11/785 and became DEC’s top-selling high-end VAX system until it was overtaken by the VAX 8800 series in 1987.
The central processor operates with an 80 ns cycle time (equivalent to 12.5 MHz) and is constructed from emitter coupled logic (ECL) macrocell arrays (MCAs), organized into four functional units: the E Box (responsible for executing all instructions including floating-point operations through microcode), the F Box (an optional floating-point accelerator plus integer multiplier/divider), the I Box (handles instruction fetch and decode), and the M Box (manages memory and I/O control while incorporating a 16 KB data cache). The F Box contains distinct adder and multiplier units composed of several MCAs.
This CPU consists of 145 MCAs manufactured by Motorola using a bipolar process at a 3 μm scale, assembled on printed circuit boards alongside roughly 1,100 additional ECL logic components distributed over seventeen modules interconnected via backplane.
Memory capacity spans from 4 MB up to 512 MB of ECC RAM across eight backplane slots. Early memory modules limited capacity to 32 MB, but higher-capacity modules were introduced subsequently. Memory operations are controlled by the M Box through a dedicated bus running at an 80 ns cycle time, providing improved throughput compared to previous designs that shared buses between memory and I/O.
Input/output functions are managed through one or two Synchronous Backplane Interconnects (SBIs), each offering up to sixteen device slots (fifteen usable), linked via adapters to an internal bus capable of bandwidths reaching up to 33.3 MB/s. A single SBI supports up to 13.3 MB/s, while dual SBIs combined provide up to 17.1 MB/s bandwidth. The system accommodates Unibus and Massbus interfaces through dedicated SBI adapters. The I/O cabinet houses a PDP-11 console processor along with card cages and disk drive mounts.
VAX 8650
The VAX 8650, known internally as "Morningstar", debuted on December 4, 1985, as an enhanced version of the VAX 8600. Initially designated "VAX-11/795", it was renamed prior to release. The VAX 8600 was notable for being the last VAX model fully compatible with both the VAX-11/780 and VAX-11/785, supporting PDP-11 compatibility mode and utilizing the SBI bus architecture inherited from the VAX-11/78x line. The CPU frequency was increased to a cycle time of 55 ns (18.18 MHz).
VAX 8200 and VAX 8300
Launched on 29 January 1986, the VAX 8200 and VAX 8300, internally known as "Scorpio", represent mid-range minicomputers. The VAX 8300 serves as a dual-processor version of the VAX 8200. Together with the VAX 8800, released the same day, these models were among the earliest multiprocessor systems within the VAX lineup. Both systems utilize the KA820 CPU module, which incorporates a V-11 microprocessor operating at 5 MHz (200 ns cycle time), and support up to 128 MB of ECC memory. They are equipped with a single VAXBI bus and offer optional Unibus compatibility.
VAX 8250 and VAX 8350
The VAX 8250 and VAX 8350, introduced in March 1987, are upgraded iterations of the VAX 8200 and VAX 8300 models. These versions feature the enhanced KA825 CPU module, which houses a V-11 microprocessor running at a higher clock speed of 6.25 MHz (160 ns cycle).
VAX 8800
Known by its codename "Nautilus", the high-end VAX 8800 comes standard with dual CPUs and dual VAXBI buses. Its advanced pipelined CPU architecture predates early commercial processors like MIPS and SPARC. Development commenced in late 1982, culminating in its launch on 29 January 1986. After the arrival of "Polarstar" systems and a revised naming convention, it was redesignated as the VAX 8820N to distinguish it from the VAX 8820 "Polarstar". Subsequent upgrades enabled full symmetric multiprocessing (SMP), leading to reclassification of previous VAX 8700 and 8800 units as part of the VAX 88x0 series—where "x" indicates the number of CPUs (for example, VAX 8810, 8820). Upgrade kits included updated front-panel numbering to reflect these changes.
VAX 8700
Also bearing the codename "Nautilus", the VAX 8700 debuted in August 1986 as a single-CPU system with one VAXBI bus, closely resembling the VAX 8800 but designed for future upgrades to that model. Following SMP enhancements, it was rebranded as the VAX 8810.
VAX 8550
Released concurrently with the VAX 8700 in August 1986, the VAX 8550, codenamed "Skipjack", shares similarities but does not support upgrades to the VAX 8800.
VAX 8500
The VAX 8500, known internally as "Flounder", is a lower-tier version of the VAX 8550 distinguished by microcode that inserts NOP instructions to deliberately reduce processing speed.
VAX 8530
Introduced in March 1987 under the same "Skipjack" codename, the VAX 8530 is an improved variant of the VAX 8500 with these NOPs removed, resulting in enhanced performance.
Polarstar
The Polarstar series represents a Nautilus derivative equipped with one to four processors and an updated console processor. The lineup includes:
- VAX 8810 – single-processor configuration
- VAX 8820 – dual-processor setup
- VAX 8842 – cluster comprising two VAX 8820 systems
- VAX 8830 – three-processor system
- VAX 8840 – four-processor system
- VAX 8974 – cluster formed by four VAX 8700 units, introduced January 1987
- VAX 8978 – cluster consisting of eight VAX 8700 units, introduced January 1987
Description
The architecture of the VAX 8800 family is built around the NMI bus, a synchronous, 32-bit bus providing an effective bandwidth of up to 64 MB/s. This bus interconnects the CPU, memory controller, and I/O adapters.
CPU
Operating at a frequency of 22.22 MHz (45 ns cycle), the CPU in the VAX 8800 is constructed from discrete emitter-coupled logic (ECL) components distributed across eight modules. Most ECL parts are macrocell arrays containing approximately 1,200 logic gates each; meanwhile, general-purpose registers and floating-point units are implemented using custom Digital logic designs. The processor also incorporates a high-speed cache of size 64 KB built from ECL RAM technology.
Memory
The memory size differs depending on the model: the VAX 8800 and 8700 accommodate between 4 MB and 512 MB, while the VAX 8550 and 8500 range from 4 MB up to 320 MB, supported by incremental releases of 4 MB, 16 MB, and 64 MB memory modules. These modules interface through a TTL bus overseen by an ECL-based memory controller located on the NMI bus module.
For the VAX 8800, three types of memory modules are utilized: the initial 4 MB module constructed with MOS DRAM and MSI TTL components; a 16 MB module consisting of eight daughter cards, each containing 2 MB DRAM chips; and a more substantial 64 MB module that considerably increases the overall memory capacity.
I/O
Input/output operations in the VAX 8800 employ the VAXBI bus architecture, which can support up to four separate VAXBI buses, each capable of handling sixteen I/O devices. The connection between the VAXBI bus and the NMI bus is established through an NBI adapter that implements the VAXBI protocol. This adapter is responsible for managing all CPU requests as well as direct memory access (DMA) transactions with peripheral devices. It functions asynchronously at a frequency of 5 MHz using its own timing source. The adapter is composed of two units: NBIA, interfacing with the NMI side, and NBIB, interfacing with the VAXBI side.
VAX Console
The system console for Nautilus processors is a DEC Professional Series PC-38N (PRO-380) outfitted with a real-time interface (RTI). This RTI links to the environmental monitoring module (EMM) and facilitates data transfer through serial communication lines. Its programmable 24-bit peripheral interface is designed to enable communication between the Nautilus system console and the VAX console. The console plays a critical role in system initialization by configuring registers, loading CPU microcode into writable control storage, executing diagnostics, resetting the time-of-year clock, recording error logs, and providing an interface for field service troubleshooting and testing.